^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // (C) 2006 Thomas Gleixner <tglx@linutronix.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mtd/rawnand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mtd/nand_ecc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "regs-gpio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "gpio-samsung.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "gpio-cfg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/platform_data/fb-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/platform_data/i2c-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/platform_data/mtd-nand-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include "s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static struct map_desc vstms_iodesc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .hwport = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .ucon = 0x3c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .ulcon = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .ufcon = 0x51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .hwport = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .ucon = 0x3c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .ulcon = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .ufcon = 0x51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .hwport = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .ucon = 0x3c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .ulcon = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .ufcon = 0x51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct mtd_partition __initdata vstms_nand_part[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .name = "Boot Agent",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .size = 0x7C000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .name = "UBoot Config",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .offset = 0x7C000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .size = 0x4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .name = "Kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .offset = 0x80000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .size = 0x200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) [3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .name = "RFS",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .offset = 0x280000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .size = 0x3d80000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static struct s3c2410_nand_set __initdata vstms_nand_sets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .name = "NAND",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .nr_chips = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .nr_partitions = ARRAY_SIZE(vstms_nand_part),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .partitions = vstms_nand_part,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* choose a set of timings which should suit most 512Mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * chips and beyond.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static struct s3c2410_platform_nand __initdata vstms_nand_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .tacls = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .twrph0 = 60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .twrph1 = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .nr_sets = ARRAY_SIZE(vstms_nand_sets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .sets = vstms_nand_sets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .engine_type = NAND_ECC_ENGINE_TYPE_SOFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static struct platform_device *vstms_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) &s3c_device_ohci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) &s3c_device_wdt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) &s3c_device_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) &s3c_device_iis,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) &s3c_device_rtc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) &s3c_device_nand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) &s3c2412_device_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static void __init vstms_fixup(struct tag *tags, char **cmdline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) memblock_add(0x30000000, SZ_64M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static void __init vstms_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static void __init vstms_init_time(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) s3c2412_init_clocks(12000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) s3c24xx_timer_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static void __init vstms_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) s3c_i2c0_set_platdata(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) s3c_nand_set_platdata(&vstms_nand_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* Configure the I2S pins (GPE0...GPE4) in correct mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) S3C_GPIO_PULL_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MACHINE_START(VSTMS, "VSTMS")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .fixup = vstms_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .init_irq = s3c2412_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .init_machine = vstms_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .map_io = vstms_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .init_time = vstms_init_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MACHINE_END