^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/platform_data/i2c-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "gpio-samsung.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static struct s3c2410_uartcfg smdk6400_uartcfgs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .hwport = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .ucon = 0x3c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .ulcon = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .ufcon = 0x51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .hwport = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .ucon = 0x3c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .ulcon = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .ufcon = 0x51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static struct map_desc smdk6400_iodesc[] = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static void __init smdk6400_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) s3c64xx_init_io(smdk6400_iodesc, ARRAY_SIZE(smdk6400_iodesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) s3c64xx_set_xtal_freq(12000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) s3c24xx_init_uarts(smdk6400_uartcfgs, ARRAY_SIZE(smdk6400_uartcfgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct platform_device *smdk6400_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) &s3c_device_hsmmc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) &s3c_device_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static struct i2c_board_info i2c_devs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { I2C_BOARD_INFO("wm8753", 0x1A), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { I2C_BOARD_INFO("24c08", 0x50), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void __init smdk6400_machine_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) i2c_register_board_info(0, i2c_devs, ARRAY_SIZE(i2c_devs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) platform_add_devices(smdk6400_devices, ARRAY_SIZE(smdk6400_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MACHINE_START(SMDK6400, "SMDK6400")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .nr_irqs = S3C64XX_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .init_irq = s3c6400_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .map_io = smdk6400_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .init_machine = smdk6400_machine_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .init_time = s3c64xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MACHINE_END