^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // linux/arch/arm/mach-s3c2440/mach-smdk2440.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Copyright (c) 2004-2005 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // http://www.fluff.org/ben/smdk2440/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) // Thanks to Dimity Andric and TomTom for the loan of an SMDK2440.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include "regs-gpio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include "gpio-samsung.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "gpio-cfg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/platform_data/fb-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/platform_data/i2c-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include "common-smdk-s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static struct map_desc smdk2440_iodesc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* ISA IO Space map (memory space selected by A24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .virtual = (u32)S3C24XX_VA_ISA_WORD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .pfn = __phys_to_pfn(S3C2410_CS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .length = 0x10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .virtual = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .length = SZ_4M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .virtual = (u32)S3C24XX_VA_ISA_BYTE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .pfn = __phys_to_pfn(S3C2410_CS2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .length = 0x10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .virtual = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .pfn = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .length = SZ_4M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .hwport = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .ucon = 0x3c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .ulcon = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .ufcon = 0x51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .hwport = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .ucon = 0x3c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .ulcon = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .ufcon = 0x51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* IR port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .hwport = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .ucon = 0x3c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .ulcon = 0x43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .ufcon = 0x51,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* LCD driver info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .lcdcon5 = S3C2410_LCDCON5_FRM565 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) S3C2410_LCDCON5_INVVLINE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) S3C2410_LCDCON5_INVVFRAME |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) S3C2410_LCDCON5_PWREN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) S3C2410_LCDCON5_HWSWP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .type = S3C2410_LCDCON1_TFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .width = 240,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .height = 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .pixclock = 166667, /* HCLK 60 MHz, divisor 10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .xres = 240,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .yres = 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .left_margin = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .right_margin = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .hsync_len = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .upper_margin = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .lower_margin = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .vsync_len = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .displays = &smdk2440_lcd_cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .num_displays = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .default_display = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* currently setup by downloader */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .gpccon = 0xaa940659,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .gpccon_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .gpcup = 0x0000ffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .gpcup_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .gpdcon = 0xaa84aaa0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .gpdcon_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .gpdup = 0x0000faff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .gpdup_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .gpccon_reg = S3C2410_GPCCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .gpcup_reg = S3C2410_GPCUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .gpdcon_reg = S3C2410_GPDCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .gpdup_reg = S3C2410_GPDUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .lpcsel = ((0xCE6) & ~7) | 1<<4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static struct platform_device *smdk2440_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) &s3c_device_ohci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) &s3c_device_lcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) &s3c_device_wdt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) &s3c_device_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) &s3c_device_iis,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static void __init smdk2440_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static void __init smdk2440_init_time(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) s3c2440_init_clocks(16934400);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) s3c24xx_timer_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static void __init smdk2440_machine_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) s3c24xx_fb_set_platdata(&smdk2440_fb_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) s3c_i2c0_set_platdata(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* Configure the I2S pins (GPE0...GPE4) in correct mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) S3C_GPIO_PULL_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) smdk_machine_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) MACHINE_START(S3C2440, "SMDK2440")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .init_irq = s3c2440_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .map_io = smdk2440_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .init_machine = smdk2440_machine_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .init_time = smdk2440_init_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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