^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (C) 2004 by FS Forth-Systeme GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // @Author: Jonas Dietsche
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // @History:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) // derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) // Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "gpio-samsung.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "gpio-cfg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/platform_data/i2c-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include "s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include "common-smdk-s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static struct map_desc smdk2410_iodesc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* nothing here yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define UCON S3C2410_UCON_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .hwport = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .ucon = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .ulcon = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .ufcon = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .hwport = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .ucon = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .ulcon = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .ufcon = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .hwport = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .ucon = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .ulcon = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .ufcon = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct platform_device *smdk2410_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) &s3c_device_ohci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) &s3c_device_lcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) &s3c_device_wdt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) &s3c_device_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) &s3c_device_iis,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static void __init smdk2410_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static void __init smdk2410_init_time(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) s3c2410_init_clocks(12000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) s3c24xx_timer_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static void __init smdk2410_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) s3c_i2c0_set_platdata(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) platform_add_devices(smdk2410_devices, ARRAY_SIZE(smdk2410_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* Configure the I2S pins (GPE0...GPE4) in correct mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) S3C_GPIO_PULL_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) smdk_machine_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * to SMDK2410 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Maintainer: Jonas Dietsche */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .map_io = smdk2410_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .init_irq = s3c2410_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .init_machine = smdk2410_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .init_time = smdk2410_init_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MACHINE_END