Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Copyright (C) 2008-2009 Samsung Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <video/platform_lcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <video/samsung_fimd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include "map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/platform_data/i2c-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include "fb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include "s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define UCON S3C2410_UCON_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static struct s3c2410_uartcfg ncp_uartcfgs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	/* REVISIT: NCP uses only serial 1, 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		.hwport	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		.flags	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		.ucon	     = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		.ulcon	     = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		.ufcon	     = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.hwport	     = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.flags	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.ucon	     = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		.ulcon	     = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		.ufcon	     = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		.hwport	     = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		.flags	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		.ucon	     = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		.ulcon	     = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		.ufcon	     = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static struct platform_device *ncp_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	&s3c_device_hsmmc1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	&s3c_device_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static struct map_desc ncp_iodesc[] __initdata = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static void __init ncp_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	s3c64xx_init_io(ncp_iodesc, ARRAY_SIZE(ncp_iodesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	s3c64xx_set_xtal_freq(12000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	s3c24xx_init_uarts(ncp_uartcfgs, ARRAY_SIZE(ncp_uartcfgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) static void __init ncp_machine_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	s3c_i2c0_set_platdata(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	platform_add_devices(ncp_devices, ARRAY_SIZE(ncp_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) MACHINE_START(NCP, "NCP")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	/* Maintainer: Samsung Electronics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	.atag_offset	= 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	.nr_irqs	= S3C64XX_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.init_irq	= s3c6410_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.map_io		= ncp_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	.init_machine	= ncp_machine_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.init_time	= s3c64xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) MACHINE_END