^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright 2011 Wolfson Microelectronics plc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Mark Brown <broonie@opensource.wolfsonmicro.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Copyright 2011 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) // Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mmc/host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/pwm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/pwm_backlight.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/dm9000.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/gpio_keys.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/platform_data/pca953x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/platform_data/s3c-hsotg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <video/platform_lcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/mfd/wm831x/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/mfd/wm831x/pdata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/mfd/wm831x/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/mfd/wm831x/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <sound/wm1250-ev1.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <video/samsung_fimd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include "map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include "regs-gpio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include "gpio-samsung.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include "fb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include "sdhci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include "gpio-cfg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/platform_data/spi-s3c64xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include "keypad.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <linux/soc/samsung/s3c-adc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <linux/platform_data/i2c-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include "pm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include "s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include "crag6410.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include "regs-gpio-memport-s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #include "regs-modem-s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include "regs-sys-s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* serial port setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .hwport = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .ucon = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .ulcon = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .ufcon = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .hwport = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .ucon = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .ulcon = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .ufcon = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .hwport = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .ucon = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .ulcon = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .ufcon = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) [3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .hwport = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .ucon = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .ulcon = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .ufcon = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static struct pwm_lookup crag6410_pwm_lookup[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) PWM_LOOKUP("samsung-pwm", 0, "pwm-backlight", NULL, 100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) PWM_POLARITY_NORMAL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static struct platform_pwm_backlight_data crag6410_backlight_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .max_brightness = 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .dft_brightness = 600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static struct platform_device crag6410_backlight_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .name = "pwm-backlight",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .parent = &samsung_device_pwm.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .platform_data = &crag6410_backlight_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) pr_debug("%s: setting power %d\n", __func__, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (power) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) gpio_set_value(S3C64XX_GPB(0), 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) gpio_direction_output(S3C64XX_GPF(14), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) gpio_set_value(S3C64XX_GPB(0), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static struct platform_device crag6410_lcd_powerdev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .name = "platform-lcd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .dev.parent = &s3c_device_fb.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .dev.platform_data = &(struct plat_lcd_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .set_power = crag6410_lcd_power_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* 640x480 URT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static struct s3c_fb_pd_win crag6410_fb_win0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .max_bpp = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .default_bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .xres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .virtual_y = 480 * 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .virtual_x = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static struct fb_videomode crag6410_lcd_timing = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .left_margin = 150,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .right_margin = 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .upper_margin = 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .lower_margin = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .hsync_len = 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .vsync_len = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .xres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static struct s3c_fb_platdata crag6410_lcd_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .vtiming = &crag6410_lcd_timing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .win[0] = &crag6410_fb_win0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* 2x6 keypad */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static uint32_t crag6410_keymap[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* KEY(row, col, keycode) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) KEY(0, 0, KEY_VOLUMEUP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) KEY(0, 1, KEY_HOME),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) KEY(0, 2, KEY_VOLUMEDOWN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) KEY(0, 3, KEY_HELP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) KEY(0, 4, KEY_MENU),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) KEY(0, 5, KEY_MEDIA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) KEY(1, 0, 232),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) KEY(1, 1, KEY_DOWN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) KEY(1, 2, KEY_LEFT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) KEY(1, 3, KEY_UP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) KEY(1, 4, KEY_RIGHT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) KEY(1, 5, KEY_CAMERA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static struct matrix_keymap_data crag6410_keymap_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .keymap = crag6410_keymap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .keymap_size = ARRAY_SIZE(crag6410_keymap),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static struct samsung_keypad_platdata crag6410_keypad_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .keymap_data = &crag6410_keymap_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .rows = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .cols = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static struct gpio_keys_button crag6410_gpio_keys[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .code = KEY_SUSPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .gpio = S3C64XX_GPL(10), /* EINT 18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .type = EV_KEY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .wakeup = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .code = SW_FRONT_PROXIMITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .gpio = S3C64XX_GPN(11), /* EINT 11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .type = EV_SW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static struct gpio_keys_platform_data crag6410_gpio_keydata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .buttons = crag6410_gpio_keys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static struct platform_device crag6410_gpio_keydev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .name = "gpio-keys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .dev.platform_data = &crag6410_gpio_keydata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static struct resource crag6410_dm9k_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) | IORESOURCE_IRQ_HIGHLEVEL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static struct dm9000_plat_data mini6410_dm9k_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .flags = DM9000_PLATF_16BITONLY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static struct platform_device crag6410_dm9k_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .name = "dm9000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .resource = crag6410_dm9k_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .dev.platform_data = &mini6410_dm9k_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static struct resource crag6410_mmgpio_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static struct platform_device crag6410_mmgpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .name = "basic-mmio-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .resource = crag6410_mmgpio_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .dev.platform_data = &(struct bgpio_pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .base = MMGPIO_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static struct platform_device speyside_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .name = "speyside",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static struct platform_device lowland_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .name = "lowland",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static struct platform_device tobermory_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .name = "tobermory",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static struct platform_device littlemill_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .name = "littlemill",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static struct platform_device bells_wm2200_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .name = "bells",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static struct platform_device bells_wm5102_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .name = "bells",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static struct platform_device bells_wm5110_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .name = "bells",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static struct regulator_consumer_supply wallvdd_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) REGULATOR_SUPPLY("SPKVDD", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) REGULATOR_SUPPLY("DC1VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) REGULATOR_SUPPLY("DC2VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) REGULATOR_SUPPLY("DC3VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) REGULATOR_SUPPLY("DC1VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) REGULATOR_SUPPLY("DC2VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) REGULATOR_SUPPLY("DC3VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static struct regulator_init_data wallvdd_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .consumer_supplies = wallvdd_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static struct fixed_voltage_config wallvdd_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .supply_name = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .microvolts = 5000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .init_data = &wallvdd_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static struct platform_device wallvdd_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .name = "reg-fixed-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .platform_data = &wallvdd_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static struct platform_device *crag6410_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) &s3c_device_hsmmc0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) &s3c_device_hsmmc2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) &s3c_device_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) &s3c_device_i2c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) &s3c_device_fb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) &s3c_device_ohci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) &s3c_device_usb_hsotg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) &samsung_device_pwm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) &s3c64xx_device_iis0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) &s3c64xx_device_iis1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) &samsung_device_keypad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) &crag6410_gpio_keydev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) &crag6410_dm9k_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) &s3c64xx_device_spi0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) &crag6410_mmgpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) &crag6410_lcd_powerdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) &crag6410_backlight_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) &speyside_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) &tobermory_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) &littlemill_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) &lowland_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) &bells_wm2200_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) &bells_wm5102_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) &bells_wm5110_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) &wallvdd_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static struct pca953x_platform_data crag6410_pca_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .gpio_base = PCA935X_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .irq_base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* VDDARM is controlled by DVS1 connected to GPK(0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static struct wm831x_buckv_pdata vddarm_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .dvs_control_src = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static struct regulator_consumer_supply vddarm_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) REGULATOR_SUPPLY("vddarm", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static struct regulator_init_data vddarm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .name = "VDDARM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .min_uV = 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .max_uV = 1300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .consumer_supplies = vddarm_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .driver_data = &vddarm_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static struct regulator_consumer_supply vddint_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) REGULATOR_SUPPLY("vddint", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static struct regulator_init_data vddint = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .name = "VDDINT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .min_uV = 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .max_uV = 1200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .consumer_supplies = vddint_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static struct regulator_init_data vddmem = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .name = "VDDMEM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static struct regulator_init_data vddsys = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static struct regulator_consumer_supply vddmmc_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) static struct regulator_init_data vddmmc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .name = "VDDMMC,UH",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .consumer_supplies = vddmmc_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static struct regulator_init_data vddotgi = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .name = "VDDOTGi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) static struct regulator_init_data vddotg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .name = "VDDOTG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static struct regulator_init_data vddhi = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .name = "VDDHI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static struct regulator_init_data vddadc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .name = "VDDADC,VDDDAC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static struct regulator_init_data vddmem0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .name = "VDDMEM0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) static struct regulator_init_data vddpll = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .name = "VDDPLL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) static struct regulator_init_data vddlcd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .name = "VDDLCD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static struct regulator_init_data vddalive = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .name = "VDDALIVE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .supply_regulator = "WALLVDD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static struct wm831x_backup_pdata banff_backup_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) .charger_enable = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .vlim = 2500, /* mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .ilim = 200, /* uA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static struct wm831x_status_pdata banff_red_led = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .name = "banff:red:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .default_src = WM831X_STATUS_MANUAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static struct wm831x_status_pdata banff_green_led = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .name = "banff:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .default_src = WM831X_STATUS_MANUAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static struct wm831x_touch_pdata touch_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .data_irq = S3C_EINT(26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .pd_irq = S3C_EINT(27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static struct wm831x_pdata crag_pmic_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .wm831x_num = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .irq_base = BANFF_PMIC_IRQ_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .gpio_base = BANFF_PMIC_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .soft_shutdown = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .backup = &banff_backup_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) .gpio_defaults = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) .dcdc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) &vddarm, /* DCDC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) &vddint, /* DCDC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) &vddmem, /* DCDC3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .ldo = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) &vddsys, /* LDO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) &vddmmc, /* LDO2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) NULL, /* LDO3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) &vddotgi, /* LDO4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) &vddotg, /* LDO5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) &vddhi, /* LDO6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) &vddadc, /* LDO7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) &vddmem0, /* LDO8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) &vddpll, /* LDO9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) &vddlcd, /* LDO10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) &vddalive, /* LDO11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) .status = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) &banff_green_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) &banff_red_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) .touch = &touch_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) * VDDARM is eventually ending up as a regulator hanging on the MFD cell device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) * "wm831x-buckv.1" spawn from drivers/mfd/wm831x-core.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) * From the note on the platform data we can see that this is clearly DVS1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) * and assigned as dcdc1 resource to the MFD core which sets .id of the cell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) * spawning the DVS1 platform device to 1, then the cell platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) * name is calculated from 10*instance + id resulting in the device name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) * "wm831x-buckv.11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static struct gpiod_lookup_table crag_pmic_gpiod_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) .dev_id = "wm831x-buckv.11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) GPIO_LOOKUP("GPIOK", 0, "dvs", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) static struct i2c_board_info i2c_devs0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) { I2C_BOARD_INFO("24c08", 0x50), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) { I2C_BOARD_INFO("tca6408", 0x20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .platform_data = &crag6410_pca_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) { I2C_BOARD_INFO("wm8312", 0x34),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .platform_data = &crag_pmic_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .irq = S3C_EINT(23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) static struct s3c2410_platform_i2c i2c0_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .frequency = 400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) REGULATOR_SUPPLY("DCVDD", "spi0.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) REGULATOR_SUPPLY("AVDD", "spi0.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) REGULATOR_SUPPLY("AVDD", "spi0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static struct regulator_init_data pvdd_1v2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .name = "PVDD_1V2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .consumer_supplies = pvdd_1v2_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) REGULATOR_SUPPLY("LDOVDD", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) REGULATOR_SUPPLY("PLLVDD", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) REGULATOR_SUPPLY("DBVDD", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) REGULATOR_SUPPLY("DBVDD1", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) REGULATOR_SUPPLY("DBVDD2", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) REGULATOR_SUPPLY("DBVDD3", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) REGULATOR_SUPPLY("CPVDD", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) REGULATOR_SUPPLY("AVDD2", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) REGULATOR_SUPPLY("DCVDD", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) REGULATOR_SUPPLY("AVDD", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) REGULATOR_SUPPLY("DBVDD", "spi0.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) REGULATOR_SUPPLY("DBVDD", "1-003a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) REGULATOR_SUPPLY("LDOVDD", "1-003a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) REGULATOR_SUPPLY("CPVDD", "1-003a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) REGULATOR_SUPPLY("AVDD", "1-003a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) REGULATOR_SUPPLY("CPVDD", "spi0.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static struct regulator_init_data pvdd_1v8 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .name = "PVDD_1V8",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) .consumer_supplies = pvdd_1v8_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) REGULATOR_SUPPLY("MICVDD", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) REGULATOR_SUPPLY("AVDD1", "1-001a"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) static struct regulator_init_data pvdd_3v3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .name = "PVDD_3V3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .consumer_supplies = pvdd_3v3_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static struct wm831x_pdata glenfarclas_pmic_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) .wm831x_num = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) .soft_shutdown = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) .gpio_defaults = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) .dcdc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) &pvdd_1v2, /* DCDC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) &pvdd_1v8, /* DCDC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) &pvdd_3v3, /* DCDC3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .disable_touch = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .gpios = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static struct i2c_board_info i2c_devs1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) { I2C_BOARD_INFO("wm8311", 0x34),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .irq = S3C_EINT(0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .platform_data = &glenfarclas_pmic_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) { I2C_BOARD_INFO("wlf-gf-module", 0x20) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) { I2C_BOARD_INFO("wm1250-ev1", 0x27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .platform_data = &wm1250_ev1_pdata },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) static struct s3c2410_platform_i2c i2c1_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .frequency = 400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .bus_num = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) static void __init crag6410_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) s3c64xx_init_io(NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) s3c64xx_set_xtal_freq(12000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) /* LCD type and Bypass set by bootloader */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .max_width = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) .cd_type = S3C_SDHCI_CD_PERMANENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .host_caps = MMC_CAP_POWER_OFF_CARD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) /* Set all the necessary GPG pins to special-function 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) /* force card-detected for prototype 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .max_width = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .cd_type = S3C_SDHCI_CD_INTERNAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) .cfg_gpio = crag6410_cfg_sdhci0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) .host_caps = MMC_CAP_POWER_OFF_CARD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) static const struct gpio_led gpio_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .name = "d13:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .gpio = MMGPIO_GPIO_BASE + 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .default_state = LEDS_GPIO_DEFSTATE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) .name = "d14:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) .gpio = MMGPIO_GPIO_BASE + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) .default_state = LEDS_GPIO_DEFSTATE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) .name = "d15:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) .gpio = MMGPIO_GPIO_BASE + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) .default_state = LEDS_GPIO_DEFSTATE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) .name = "d16:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) .gpio = MMGPIO_GPIO_BASE + 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) .default_state = LEDS_GPIO_DEFSTATE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) .name = "d17:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .gpio = MMGPIO_GPIO_BASE + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .default_state = LEDS_GPIO_DEFSTATE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) .name = "d18:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) .gpio = MMGPIO_GPIO_BASE + 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) .default_state = LEDS_GPIO_DEFSTATE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .name = "d19:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) .gpio = MMGPIO_GPIO_BASE + 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) .default_state = LEDS_GPIO_DEFSTATE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) .name = "d20:green:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) .gpio = MMGPIO_GPIO_BASE + 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .default_state = LEDS_GPIO_DEFSTATE_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) static const struct gpio_led_platform_data gpio_leds_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .leds = gpio_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) .num_leds = ARRAY_SIZE(gpio_leds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static struct dwc2_hsotg_plat crag6410_hsotg_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) static void __init crag6410_machine_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) /* Open drain IRQs need pullups */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) gpio_request(S3C64XX_GPB(0), "LCD power");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) gpio_direction_output(S3C64XX_GPB(0), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) gpio_request(S3C64XX_GPF(14), "LCD PWM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) gpio_request(S3C64XX_GPB(1), "SD power");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) gpio_direction_output(S3C64XX_GPB(1), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) gpio_request(S3C64XX_GPF(10), "nRESETSEL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) gpio_direction_output(S3C64XX_GPF(10), 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) s3c_i2c0_set_platdata(&i2c0_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) s3c_i2c1_set_platdata(&i2c1_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) s3c_fb_set_platdata(&crag6410_lcd_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) dwc2_hsotg_set_platdata(&crag6410_hsotg_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) gpiod_add_lookup_table(&crag_pmic_gpiod_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) samsung_keypad_set_platdata(&crag6410_keypad_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) s3c64xx_spi0_set_platdata(NULL, 0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) pwm_add_table(crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) gpio_led_register_device(-1, &gpio_leds_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) regulator_has_full_constraints();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) s3c64xx_pm_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) .nr_irqs = S3C64XX_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .init_irq = s3c6410_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) .map_io = crag6410_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) .init_machine = crag6410_machine_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) .init_time = s3c64xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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