Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //      Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) //      and modifications by SBZ <sbz@spgui.org> and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) //      Weibing <http://weibing.blogbus.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) // For product information, visit http://www.arm.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/dm9000.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/platform_data/fb-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include "regs-gpio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include "gpio-samsung.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/platform_data/mtd-nand-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/platform_data/i2c-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <linux/mtd/rawnand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <linux/mtd/nand_ecc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #include <linux/platform_data/mmc-s3cmci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #include "s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static struct map_desc at2440evb_iodesc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	/* Nothing here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define UCON S3C2410_UCON_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.hwport	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		.flags	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		.ucon	     = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		.ulcon	     = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		.ufcon	     = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		.clk_sel	= S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		.hwport	     = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		.flags	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		.ucon	     = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		.ulcon	     = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.ufcon	     = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		.clk_sel	= S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) /* NAND Flash on AT2440EVB board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		.name	= "Boot Agent",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		.size	= SZ_256K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		.offset	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		.name	= "Kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		.size	= SZ_2M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		.offset	= SZ_256K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		.name	= "Root",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		.offset	= SZ_256K + SZ_2M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		.size	= MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		.name		= "nand",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		.nr_chips	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		.nr_partitions	= ARRAY_SIZE(at2440evb_default_nand_part),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		.partitions	= at2440evb_default_nand_part,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.tacls		= 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	.twrph0		= 55,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	.twrph1		= 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	.nr_sets	= ARRAY_SIZE(at2440evb_nand_sets),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	.sets		= at2440evb_nand_sets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	.engine_type	= NAND_ECC_ENGINE_TYPE_SOFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* DM9000AEP 10/100 ethernet controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static struct resource at2440evb_dm9k_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	[0] = DEFINE_RES_MEM(S3C2410_CS3, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	[1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 					| IORESOURCE_IRQ_HIGHEDGE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static struct dm9000_plat_data at2440evb_dm9k_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	.flags		= (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static struct platform_device at2440evb_device_eth = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	.name		= "dm9000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	.id		= -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	.num_resources	= ARRAY_SIZE(at2440evb_dm9k_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	.resource	= at2440evb_dm9k_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	.dev		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		.platform_data	= &at2440evb_dm9k_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.set_power	= s3c24xx_mci_def_set_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static struct gpiod_lookup_table at2440evb_mci_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.dev_id = "s3c2410-sdi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	.table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		/* Card detect S3C2410_GPG(10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		GPIO_LOOKUP("GPIOG", 10, "cd", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		/* bus pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		GPIO_LOOKUP_IDX("GPIOE",  5, "bus", 0, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		GPIO_LOOKUP_IDX("GPIOE",  6, "bus", 1, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		GPIO_LOOKUP_IDX("GPIOE",  7, "bus", 2, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		GPIO_LOOKUP_IDX("GPIOE",  8, "bus", 3, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		GPIO_LOOKUP_IDX("GPIOE",  9, "bus", 4, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 		GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* 7" LCD panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	.lcdcon5	= S3C2410_LCDCON5_FRM565 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			  S3C2410_LCDCON5_INVVLINE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			  S3C2410_LCDCON5_INVVFRAME |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 			  S3C2410_LCDCON5_PWREN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			  S3C2410_LCDCON5_HWSWP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	.type		= S3C2410_LCDCON1_TFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.width		= 800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	.height		= 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	.pixclock	= 33333, /* HCLK 60 MHz, divisor 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.xres		= 800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.yres		= 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.bpp		= 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.left_margin	= 88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.right_margin	= 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.hsync_len	= 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	.upper_margin	= 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	.lower_margin	= 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.vsync_len	= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.displays	= &at2440evb_lcd_cfg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	.num_displays	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	.default_display = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static struct platform_device *at2440evb_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	&s3c_device_ohci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	&s3c_device_wdt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	&s3c_device_adc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	&s3c_device_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	&s3c_device_rtc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	&s3c_device_nand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	&s3c_device_sdi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	&s3c_device_lcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	&at2440evb_device_eth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static void __init at2440evb_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static void __init at2440evb_init_time(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	s3c2440_init_clocks(16934400);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	s3c24xx_timer_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static void __init at2440evb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	s3c24xx_fb_set_platdata(&at2440evb_fb_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	gpiod_add_lookup_table(&at2440evb_mci_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	s3c_nand_set_platdata(&at2440evb_nand_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	s3c_i2c0_set_platdata(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) MACHINE_START(AT2440EVB, "AT2440EVB")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	.atag_offset	= 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	.map_io		= at2440evb_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	.init_machine	= at2440evb_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	.init_irq	= s3c2440_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	.init_time	= at2440evb_init_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) MACHINE_END