Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) // Copyright (c) 2006 American Microsystems Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) //	David Anders <danders@amltd.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) // @History:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) // derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) // Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/platform_data/fb-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include "regs-gpio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include "gpio-samsung.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <linux/platform_data/i2c-s3c2410.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #include "gpio-cfg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #include <linux/mtd/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #include "s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static struct resource amlm5900_nor_resource =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			DEFINE_RES_MEM(0x00000000, SZ_16M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static struct mtd_partition amlm5900_mtd_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		.name		= "System",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		.size		= 0x240000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		.offset		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		.mask_flags 	= MTD_WRITEABLE,  /* force read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		.name		= "Kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 		.size		= 0x100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		.offset		= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		.name		= "Ramdisk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		.size		= 0x300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		.offset		= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		.name		= "JFFS2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		.size		= 0x9A0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.offset		= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		.name		= "Settings",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		.size		= MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		.offset		= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) static struct physmap_flash_data amlm5900_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	.width		= 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	.parts		= amlm5900_mtd_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	.nr_parts	= ARRAY_SIZE(amlm5900_mtd_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static struct platform_device amlm5900_device_nor = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	.name		= "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	.id		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	.dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 			.platform_data = &amlm5900_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	.num_resources	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	.resource	= &amlm5900_nor_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) static struct map_desc amlm5900_iodesc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define UCON S3C2410_UCON_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static struct s3c2410_uartcfg amlm5900_uartcfgs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		.hwport	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		.flags	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		.ucon	     = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		.ulcon	     = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		.ufcon	     = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		.hwport	     = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		.flags	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		.ucon	     = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		.ulcon	     = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		.ufcon	     = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		.hwport	     = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		.flags	     = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		.ucon	     = UCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		.ulcon	     = ULCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		.ufcon	     = UFCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static struct gpiod_lookup_table amlm5900_mmc_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	.dev_id = "s3c2410-sdi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	.table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		/* bus pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		GPIO_LOOKUP_IDX("GPIOE",  5, "bus", 0, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		GPIO_LOOKUP_IDX("GPIOE",  6, "bus", 1, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		GPIO_LOOKUP_IDX("GPIOE",  7, "bus", 2, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		GPIO_LOOKUP_IDX("GPIOE",  8, "bus", 3, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		GPIO_LOOKUP_IDX("GPIOE",  9, "bus", 4, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		{ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static struct platform_device *amlm5900_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #ifdef CONFIG_FB_S3C2410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	&s3c_device_lcd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	&s3c_device_adc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	&s3c_device_wdt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	&s3c_device_i2c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	&s3c_device_ohci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)  	&s3c_device_rtc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	&s3c_device_usbgadget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)         &s3c_device_sdi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	&amlm5900_device_nor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static void __init amlm5900_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static void __init amlm5900_init_time(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	s3c2410_init_clocks(12000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	s3c24xx_timer_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #ifdef CONFIG_FB_S3C2410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static struct s3c2410fb_display __initdata amlm5900_lcd_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	.width		= 160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.height		= 160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.type		= S3C2410_LCDCON1_STN4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	.pixclock	= 680000, /* HCLK = 100MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.xres		= 160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	.yres		= 160,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.bpp		= 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.left_margin	= 1 << (4 + 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.right_margin	= 8 << 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	.hsync_len	= 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	.upper_margin	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.lower_margin	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	.lcdcon5	= 0x00000001,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static struct s3c2410fb_mach_info __initdata amlm5900_fb_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.displays = &amlm5900_lcd_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	.num_displays = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	.default_display = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	.gpccon =	0xaaaaaaaa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	.gpccon_mask =	0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	.gpccon_reg =	S3C2410_GPCCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	.gpcup =	0x0000ffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	.gpcup_mask =	0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	.gpcup_reg =	S3C2410_GPCUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	.gpdcon =	0xaaaaaaaa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.gpdcon_mask =	0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	.gpdcon_reg =	S3C2410_GPDCON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	.gpdup =	0x0000ffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	.gpdup_mask =	0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	.gpdup_reg =	S3C2410_GPDUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) amlm5900_wake_interrupt(int irq, void *ignored)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static void amlm5900_init_pm(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	ret = request_irq(IRQ_EINT9, &amlm5900_wake_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 				IRQF_TRIGGER_RISING | IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 				"amlm5900_wakeup", &amlm5900_wake_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		printk(KERN_ERR "AML-M5900: no wakeup irq, %d?\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		enable_irq_wake(IRQ_EINT9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		/* configure the suspend/resume status pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 		s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_UP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static void __init amlm5900_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	amlm5900_init_pm();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #ifdef CONFIG_FB_S3C2410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	s3c24xx_fb_set_platdata(&amlm5900_fb_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	s3c_i2c0_set_platdata(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	gpiod_add_lookup_table(&amlm5900_mmc_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) MACHINE_START(AML_M5900, "AML_M5900")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	.atag_offset	= 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	.map_io		= amlm5900_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	.init_irq	= s3c2410_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	.init_machine	= amlm5900_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	.init_time	= amlm5900_init_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) MACHINE_END