^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright 2008 Openmoko, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Copyright 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // S3C64XX - Interrupt handling Power Management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * NOTE: Code in this file is not used when booting with Device Tree support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/syscore_ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "regs-gpio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "pm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* We handled all the IRQ types in this code, to save having to make several
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * small files to handle each different type separately. Having the EINT_GRP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * code here shouldn't be as much bloat as the IRQ table space needed when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * they are enabled. The added benefit is we ensure that these registers are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * in the same state as we suspended.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static struct sleep_save irq_save[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) SAVE_ITEM(S3C64XX_PRIORITY),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) SAVE_ITEM(S3C64XX_EINT0CON0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) SAVE_ITEM(S3C64XX_EINT0CON1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) SAVE_ITEM(S3C64XX_EINT0FLTCON0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) SAVE_ITEM(S3C64XX_EINT0FLTCON1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) SAVE_ITEM(S3C64XX_EINT0FLTCON2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) SAVE_ITEM(S3C64XX_EINT0FLTCON3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) SAVE_ITEM(S3C64XX_EINT0MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static struct irq_grp_save {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u32 fltcon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u32 con;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u32 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) } eint_grp_save[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #ifndef CONFIG_SERIAL_SAMSUNG_UARTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define SERIAL_SAMSUNG_UARTS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define SERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int s3c64xx_irq_pm_suspend(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct irq_grp_save *grp = eint_grp_save;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) S3C_PMDBG("%s: suspending IRQs\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) grp->con = __raw_readl(S3C64XX_EINT12CON + (i * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) grp->mask = __raw_readl(S3C64XX_EINT12MASK + (i * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) grp->fltcon = __raw_readl(S3C64XX_EINT12FLTCON + (i * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static void s3c64xx_irq_pm_resume(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct irq_grp_save *grp = eint_grp_save;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) S3C_PMDBG("%s: resuming IRQs\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) __raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) __raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) __raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static struct syscore_ops s3c64xx_irq_syscore_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .suspend = s3c64xx_irq_pm_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .resume = s3c64xx_irq_pm_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static __init int s3c64xx_syscore_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* Appropriate drivers (pinctrl, uart) handle this when using DT. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) if (of_have_populated_dt() || !soc_is_s3c64xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) register_syscore_ops(&s3c64xx_irq_syscore_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) core_initcall(s3c64xx_syscore_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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