^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * S3C2410 - GPIO lib support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* some boards require extra gpio capacity to support external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * devices that need GPIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifndef GPIO_SAMSUNG_S3C24XX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define GPIO_SAMSUNG_S3C24XX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * GPIO sizes for various SoCs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * 2410 2412 2440 2443 2416
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * 2442
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * ---- ---- ---- ---- ----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * A 23 22 25 16 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * B 11 11 11 11 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * C 16 16 16 16 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * D 16 16 16 16 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * E 16 16 16 16 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * F 8 8 8 8 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * G 16 16 16 16 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * H 11 11 11 15 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * J -- -- 13 16 --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * K -- -- -- -- 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * L -- -- -- 15 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * M -- -- -- 2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* GPIO bank sizes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define S3C2410_GPIO_A_NR (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define S3C2410_GPIO_B_NR (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define S3C2410_GPIO_C_NR (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define S3C2410_GPIO_D_NR (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define S3C2410_GPIO_E_NR (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define S3C2410_GPIO_F_NR (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define S3C2410_GPIO_G_NR (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define S3C2410_GPIO_H_NR (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define S3C2410_GPIO_J_NR (32) /* technically 16. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define S3C2410_GPIO_K_NR (32) /* technically 16. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define S3C2410_GPIO_L_NR (32) /* technically 15. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define S3C2410_GPIO_M_NR (32) /* technically 2. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #if CONFIG_S3C_GPIO_SPACE != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define S3C2410_GPIO_NEXT(__gpio) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) enum s3c_gpio_number {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) S3C2410_GPIO_A_START = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* S3C2410 GPIO number definitions. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #ifdef CONFIG_CPU_S3C244X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define S3C_GPIO_END (S3C2410_GPJ(0) + 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define S3C_GPIO_END (S3C2410_GPM(0) + 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define S3C_GPIO_END (S3C2410_GPH(0) + 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #endif /* GPIO_SAMSUNG_S3C24XX_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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