Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright 2008 Openmoko, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *	http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *	Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * S3C Platform - GPIO pin configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) /* This file contains the necessary definitions to get the basic gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * pin configuration done such as setting a pin to input or output or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * changing the pull-{up,down} configurations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) /* Note, this interface is being added to the s3c64xx arch first and will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * be added to the s3c24xx systems later.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #ifndef __PLAT_GPIO_CFG_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define __PLAT_GPIO_CFG_H __FILE__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) typedef unsigned int __bitwise samsung_gpio_pull_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /* forward declaration if gpio-core.h hasn't been included */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) struct samsung_gpio_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * struct samsung_gpio_cfg GPIO configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * @cfg_eint: Configuration setting when used for external interrupt source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * @get_pull: Read the current pull configuration for the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * @set_pull: Set the current pull configuration for the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * @set_config: Set the current configuration for the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * @get_config: Read the current configuration for the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * Each chip can have more than one type of GPIO bank available and some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * have different capabilites even when they have the same control register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * layouts. Provide an point to vector control routine and provide any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * per-bank configuration information that other systems such as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * external interrupt code will need.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * @sa samsung_gpio_cfgpin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * @sa s3c_gpio_getcfg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * @sa s3c_gpio_setpull
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * @sa s3c_gpio_getpull
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) struct samsung_gpio_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	unsigned int	cfg_eint;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	samsung_gpio_pull_t	(*get_pull)(struct samsung_gpio_chip *chip, unsigned offs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	int		(*set_pull)(struct samsung_gpio_chip *chip, unsigned offs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 				    samsung_gpio_pull_t pull);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	int	 (*set_config)(struct samsung_gpio_chip *chip, unsigned offs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			       unsigned config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define S3C_GPIO_SPECIAL_MARK	(0xfffffff0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define S3C_GPIO_SPECIAL(x)	(S3C_GPIO_SPECIAL_MARK | (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /* Defines for generic pin configurations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define S3C_GPIO_INPUT	(S3C_GPIO_SPECIAL(0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define S3C_GPIO_OUTPUT	(S3C_GPIO_SPECIAL(1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define S3C_GPIO_SFN(x)	(S3C_GPIO_SPECIAL(x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define samsung_gpio_is_cfg_special(_cfg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	(((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)  * @pin pin The pin number to configure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  * @to to The configuration for the pin's function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)  * Configure which function is actually connected to the external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  * pin, such as an gpio input, output or some form of special function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  * connected to an internal peripheral block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  * will then generate the correct bit mask and shift for the configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  * If a bank of GPIOs all needs to be set to special-function 2, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  * the following code will work:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  *	for (gpio = start; gpio < end; gpio++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  *		s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * The @to parameter can also be a specific value already shifted to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * correct position in the control register, although these are discouraged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  * in newer kernels and are only being kept for compatibility.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)  * s3c_gpio_getcfg - Read the current function for a GPIO pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)  * @pin: The pin to read the configuration value for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)  * Read the configuration state of the given @pin, returning a value that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)  * could be passed back to s3c_gpio_cfgpin().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)  * @sa s3c_gpio_cfgpin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) extern unsigned s3c_gpio_getcfg(unsigned int pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  * @start: The pin number to start at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * @nr: The number of pins to configure from @start.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * @cfg: The configuration for the pin's function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  * @sa s3c_gpio_cfgpin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 				 unsigned int cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* Define values for the pull-{up,down} available for each gpio pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)  * These values control the state of the weak pull-{up,down} resistors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)  * available on most pins on the S3C series. Not all chips support both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)  * up or down settings, and it may be dependent on the chip that is being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)  * used to whether the particular mode is available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define S3C_GPIO_PULL_NONE	((__force samsung_gpio_pull_t)0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define S3C_GPIO_PULL_DOWN	((__force samsung_gpio_pull_t)0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define S3C_GPIO_PULL_UP	((__force samsung_gpio_pull_t)0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)  * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)  * @pin: The pin number to configure the pull resistor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)  * @pull: The configuration for the pull resistor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)  * This function sets the state of the pull-{up,down} resistor for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)  * specified pin. It will return 0 if successful, or a negative error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)  * code if the pin cannot support the requested pull setting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)  * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)  * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)  * @pin: The pin number to get the settings for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)  * Read the pull resistor value for the specified pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) extern samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* configure `all` aspects of an gpio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)  * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)  * @start: The gpio number to start at.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)  * @nr: The number of gpio to configure from @start.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)  * @cfg: The configuration to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)  * @pull: The pull setting to use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)  * @gpio and running for @size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)  * @sa s3c_gpio_cfgpin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)  * @sa s3c_gpio_setpull
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)  * @sa s3c_gpio_cfgpin_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 				 unsigned int cfg, samsung_gpio_pull_t pull);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 					   unsigned int cfg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #endif /* __PLAT_GPIO_CFG_H */