^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/common/time-acorn.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 1996-2000 Russell King.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Changelog:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * 24-Sep-1996 RMK Created
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * 10-Oct-1996 RMK Brought up to date with arch-sa110eval
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * 04-Dec-1997 RMK Updated for new arch/arm/time.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/hardware/ioc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define RPC_CLOCK_FREQ 2000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RPC_LATCH DIV_ROUND_CLOSEST(RPC_CLOCK_FREQ, HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static u32 ioc_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static u64 ioc_timer_read(struct clocksource *cs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int count1, count2, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ioc_writeb (0, IOC_T0LATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) barrier ();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) barrier ();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) status = ioc_readb(IOC_IRQREQA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) barrier ();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ioc_writeb (0, IOC_T0LATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) barrier ();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ticks = ioc_time + RPC_LATCH - count2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (count2 < count1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * The timer has not reloaded between reading count1 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * count2, check whether an interrupt was actually pending.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (status & (1 << 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ticks += RPC_LATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) } else if (count2 > count1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * The timer has reloaded, so count2 indicates the new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * count since the wrap. The interrupt would not have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * been processed, so add the missed ticks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ticks += RPC_LATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static struct clocksource ioctime_clocksource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .read = ioc_timer_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .mask = CLOCKSOURCE_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .rating = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) void __init ioctime_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ioc_writeb(RPC_LATCH & 255, IOC_T0LTCHL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ioc_writeb(RPC_LATCH >> 8, IOC_T0LTCHH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) ioc_writeb(0, IOC_T0GO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ioc_timer_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ioc_time += RPC_LATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) timer_tick();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * Set up timer interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) void __init ioc_timer_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) WARN_ON(clocksource_register_hz(&ioctime_clocksource, RPC_CLOCK_FREQ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ioctime_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (request_irq(IRQ_TIMER0, ioc_timer_interrupt, 0, "timer", NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) pr_err("Failed to request irq %d (timer)\n", IRQ_TIMER0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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