^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) config ARCH_ROCKCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) bool "Rockchip RK2928 and RK3xxx SOCs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) depends on ARCH_MULTI_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) select PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) select PINCTRL_ROCKCHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) select ARCH_HAS_RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) select ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) select ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) select CACHE_L2X0 if (CPU_RK30XX || CPU_RK3188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) select HAVE_ARM_ARCH_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) select HAVE_ARM_SCU if SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) select HAVE_ARM_TWD if SMP && (CPU_RK30XX || CPU_RK3188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) select DW_APB_TIMER_OF if CPU_RK30XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) select REGULATOR if PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) select ROCKCHIP_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) select ARM_GLOBAL_TIMER if (CPU_RK30XX || CPU_RK3188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK if (CPU_RK30XX || CPU_RK3188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) select ZONE_DMA if ARM_LPAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) select PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) containing the RK2928, RK30xx and RK31xx series.