Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2015 Linus Walleij
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/smp_plat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/smp_scu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <plat/platsmp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define REALVIEW_SYS_FLAGSSET_OFFSET	0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static const struct of_device_id realview_scu_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	{ .compatible = "arm,arm11mp-scu", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	{ .compatible = "arm,cortex-a9-scu", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	{ .compatible = "arm,cortex-a5-scu", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	{ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static const struct of_device_id realview_syscon_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)         { .compatible = "arm,core-module-integrator", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)         { .compatible = "arm,realview-eb-syscon", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)         { .compatible = "arm,realview-pb11mp-syscon", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)         { .compatible = "arm,realview-pbx-syscon", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)         { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	void __iomem *scu_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	struct regmap *map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	unsigned int ncores;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	np = of_find_matching_node(NULL, realview_scu_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	if (!np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		pr_err("PLATSMP: No SCU base address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	scu_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	if (!scu_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		pr_err("PLATSMP: No SCU remap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	scu_enable(scu_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	ncores = scu_get_core_count(scu_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	pr_info("SCU: %d cores detected\n", ncores);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	for (i = 0; i < ncores; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		set_cpu_possible(i, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	iounmap(scu_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	/* The syscon contains the magic SMP start address registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	np = of_find_matching_node(NULL, realview_syscon_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	if (!np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		pr_err("PLATSMP: No syscon match\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	map = syscon_node_to_regmap(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	if (IS_ERR(map)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 		pr_err("PLATSMP: No syscon regmap\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	/* Put the boot address in this magic register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	regmap_write(map, REALVIEW_SYS_FLAGSSET_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 		     __pa_symbol(versatile_secondary_startup));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #ifdef CONFIG_HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static void realview_cpu_die(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	return versatile_immitation_cpu_die(cpu, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static const struct smp_operations realview_dt_smp_ops __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	.smp_prepare_cpus	= realview_smp_prepare_cpus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 	.smp_secondary_init	= versatile_secondary_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 	.smp_boot_secondary	= versatile_boot_secondary,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #ifdef CONFIG_HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 	.cpu_die		= realview_cpu_die,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) CPU_METHOD_OF_DECLARE(realview_smp, "arm,realview-smp", &realview_dt_smp_ops);