^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* linux/arch/arm/mach-pxa/xcep.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Support for the Iskratel Electronics XCEP platform as used in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * the Libera instruments from Instrumentation Technologies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Ales Bardorfer <ales@i-tech.si>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Contributions by: Abbott, MG (Michael) <michael.abbott@diamond.ac.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Contributions by: Matej Kenda <matej.kenda@i-tech.si>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Created: June 2006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright: (C) 2006-2009 Instrumentation Technologies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_data/i2c-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/smc91x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "pxa25x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <mach/smemc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define XCEP_ETH_PHYS (PXA_CS3_PHYS + 0x00000300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define XCEP_ETH_PHYS_END (PXA_CS3_PHYS + 0x000fffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define XCEP_ETH_ATTR (PXA_CS3_PHYS + 0x02000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define XCEP_ETH_ATTR_END (PXA_CS3_PHYS + 0x020fffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define XCEP_ETH_IRQ IRQ_GPIO0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* XCEP CPLD base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define XCEP_CPLD_BASE 0xf0000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* Flash partitions. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static struct mtd_partition xcep_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .name = "Bootloader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .size = 0x00040000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .mask_flags = MTD_WRITEABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .name = "Bootloader ENV",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .size = 0x00040000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .offset = 0x00040000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .mask_flags = MTD_WRITEABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .name = "Kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .size = 0x00100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .offset = 0x00080000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .name = "Rescue fs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .size = 0x00280000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .offset = 0x00180000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .name = "Filesystem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .offset = 0x00400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct physmap_flash_data xcep_flash_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .width = 4, /* bankwidth in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .parts = xcep_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .nr_parts = ARRAY_SIZE(xcep_partitions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static struct resource flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .start = PXA_CS0_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .end = PXA_CS0_PHYS + SZ_32M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static struct platform_device flash_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .platform_data = xcep_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .resource = &flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* SMC LAN91C111 network controller. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static struct resource smc91x_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .name = "smc91x-regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .start = XCEP_ETH_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .end = XCEP_ETH_PHYS_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .start = XCEP_ETH_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .end = XCEP_ETH_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .name = "smc91x-attrib",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .start = XCEP_ETH_ATTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .end = XCEP_ETH_ATTR_END,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) static struct smc91x_platdata xcep_smc91x_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) SMC91X_NOWAIT | SMC91X_USE_DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static struct platform_device smc91x_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .name = "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .num_resources = ARRAY_SIZE(smc91x_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .resource = smc91x_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .platform_data = &xcep_smc91x_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static struct platform_device *devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) &flash_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) &smc91x_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* We have to state that there are HWMON devices on the I2C bus on XCEP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * Drivers for HWMON verify capabilities of the adapter when loading and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * refuse to attach if the adapter doesn't support HWMON class of devices. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static struct i2c_pxa_platform_data xcep_i2c_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .class = I2C_CLASS_HWMON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static mfp_cfg_t xcep_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) GPIO79_nCS_3, /* SMC 91C111 chip select. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) GPIO80_nCS_4, /* CPLD chip select. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* SSP communication to MSP430 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) GPIO23_SSP1_SCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) GPIO24_SSP1_SFRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) GPIO25_SSP1_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) GPIO26_SSP1_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) GPIO27_SSP1_EXTCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static void __init xcep_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) pxa_set_ffuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) pxa_set_btuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) pxa_set_stuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) pxa_set_hwuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* See Intel XScale Developer's Guide for details */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) __raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) __raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) platform_add_devices(ARRAY_AND_SIZE(devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) pxa_set_i2c_info(&xcep_i2c_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) MACHINE_START(XCEP, "Iskratel XCEP")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .init_machine = xcep_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .map_io = pxa25x_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .nr_irqs = PXA_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .init_irq = pxa25x_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .handle_irq = pxa25x_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .init_time = pxa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .restart = pxa_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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