^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Hardware definitions for Voipac PXA270
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Marek Vasut <marek.vasut@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/gpio_keys.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mtd/onenand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/dm9000.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/ucb1400.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/ata_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/regulator/max1586.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/platform_data/i2c-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "pxa27x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <mach/audio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <mach/vpac270.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/platform_data/mmc-pxamci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/platform_data/video-pxafb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/platform_data/usb-ohci-pxa27x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include "pxa27x-udc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include "udc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/platform_data/ata-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * Pin configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static unsigned long vpac270_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* MMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) GPIO32_MMC_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) GPIO92_MMC_DAT_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) GPIO109_MMC_DAT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) GPIO110_MMC_DAT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) GPIO111_MMC_DAT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) GPIO112_MMC_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) GPIO53_GPIO, /* SD detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) GPIO52_GPIO, /* SD r/o switch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* GPIO KEYS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) GPIO1_GPIO, /* USER BTN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* LEDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) GPIO15_GPIO, /* orange led */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* FFUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) GPIO34_FFUART_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) GPIO39_FFUART_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) GPIO27_FFUART_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) GPIO100_FFUART_CTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) GPIO33_FFUART_DSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) GPIO40_FFUART_DTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) GPIO10_FFUART_DCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) GPIO38_FFUART_RI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) GPIO58_LCD_LDD_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) GPIO59_LCD_LDD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) GPIO60_LCD_LDD_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) GPIO61_LCD_LDD_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) GPIO62_LCD_LDD_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) GPIO63_LCD_LDD_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) GPIO64_LCD_LDD_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) GPIO65_LCD_LDD_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) GPIO66_LCD_LDD_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) GPIO67_LCD_LDD_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) GPIO68_LCD_LDD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) GPIO69_LCD_LDD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) GPIO70_LCD_LDD_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) GPIO71_LCD_LDD_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) GPIO72_LCD_LDD_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) GPIO73_LCD_LDD_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) GPIO86_LCD_LDD_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) GPIO87_LCD_LDD_17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) GPIO74_LCD_FCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) GPIO75_LCD_LCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) GPIO76_LCD_PCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) GPIO77_LCD_BIAS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* PCMCIA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) GPIO48_nPOE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) GPIO49_nPWE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) GPIO50_nPIOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) GPIO51_nPIOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) GPIO85_nPCE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) GPIO54_nPCE_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) GPIO55_nPREG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) GPIO57_nIOIS16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) GPIO56_nPWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) GPIO104_PSKTSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) GPIO84_GPIO, /* PCMCIA CD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) GPIO35_GPIO, /* PCMCIA RDY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) GPIO107_GPIO, /* PCMCIA PPEN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) GPIO11_GPIO, /* PCMCIA RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) GPIO17_GPIO, /* CF CD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) GPIO12_GPIO, /* CF RDY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) GPIO16_GPIO, /* CF RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* UHC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) GPIO88_USBH1_PWR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) GPIO89_USBH1_PEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) GPIO119_USBH2_PWR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) GPIO120_USBH2_PEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /* UDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) GPIO41_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* Ethernet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) GPIO114_GPIO, /* IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* AC97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) GPIO28_AC97_BITCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) GPIO29_AC97_SDATA_IN_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) GPIO30_AC97_SDATA_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) GPIO31_AC97_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) GPIO95_AC97_nRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) GPIO98_AC97_SYSCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) GPIO113_GPIO, /* TS IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) GPIO117_I2C_SCL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) GPIO118_I2C_SDA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* IDE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) GPIO36_GPIO, /* IDE IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) GPIO80_DREQ_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * NOR Flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static struct mtd_partition vpac270_nor_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .name = "Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .offset = 0x00000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static struct physmap_flash_data vpac270_flash_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .width = 2, /* bankwidth in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .parts = vpac270_nor_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .nr_parts = ARRAY_SIZE(vpac270_nor_partitions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static struct resource vpac270_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .start = PXA_CS0_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .end = PXA_CS0_PHYS + SZ_64M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static struct platform_device vpac270_flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .resource = &vpac270_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .platform_data = vpac270_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static void __init vpac270_nor_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) platform_device_register(&vpac270_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static inline void vpac270_nor_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * OneNAND Flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static struct mtd_partition vpac270_onenand_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .name = "Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .offset = 0x00000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static struct onenand_platform_data vpac270_onenand_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .parts = vpac270_onenand_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .nr_parts = ARRAY_SIZE(vpac270_onenand_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static struct resource vpac270_onenand_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .start = PXA_CS0_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .end = PXA_CS0_PHYS + SZ_1M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static struct platform_device vpac270_onenand = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .name = "onenand-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .resource = vpac270_onenand_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .num_resources = ARRAY_SIZE(vpac270_onenand_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .platform_data = &vpac270_onenand_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static void __init vpac270_onenand_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) platform_device_register(&vpac270_onenand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static void __init vpac270_onenand_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * SD/MMC card controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static struct pxamci_platform_data vpac270_mci_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .detect_delay_ms = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static struct gpiod_lookup_table vpac270_mci_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .dev_id = "pxa2xx-mci.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) GPIO_LOOKUP("gpio-pxa", GPIO53_VPAC270_SD_DETECT_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) "cd", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) GPIO_LOOKUP("gpio-pxa", GPIO52_VPAC270_SD_READONLY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) "wp", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static void __init vpac270_mmc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) gpiod_add_lookup_table(&vpac270_mci_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) pxa_set_mci_info(&vpac270_mci_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static inline void vpac270_mmc_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * GPIO keys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static struct gpio_keys_button vpac270_pxa_buttons[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {KEY_POWER, GPIO1_VPAC270_USER_BTN, 0, "USER BTN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static struct gpio_keys_platform_data vpac270_pxa_keys_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .buttons = vpac270_pxa_buttons,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .nbuttons = ARRAY_SIZE(vpac270_pxa_buttons),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static struct platform_device vpac270_pxa_keys = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .name = "gpio-keys",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .platform_data = &vpac270_pxa_keys_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static void __init vpac270_keys_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) platform_device_register(&vpac270_pxa_keys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static inline void vpac270_keys_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * LED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct gpio_led vpac270_gpio_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .name = "vpac270:orange:user",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .default_trigger = "none",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .gpio = GPIO15_VPAC270_LED_ORANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static struct gpio_led_platform_data vpac270_gpio_led_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .leds = vpac270_gpio_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .num_leds = ARRAY_SIZE(vpac270_gpio_leds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static struct platform_device vpac270_leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .platform_data = &vpac270_gpio_led_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static void __init vpac270_leds_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) platform_device_register(&vpac270_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static inline void vpac270_leds_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * USB Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static int vpac270_ohci_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static struct pxaohci_platform_data vpac270_ohci_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .port_mode = PMM_PERPORT_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .flags = ENABLE_PORT1 | ENABLE_PORT2 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) POWER_CONTROL_LOW | POWER_SENSE_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .init = vpac270_ohci_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static void __init vpac270_uhc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) pxa_set_ohci_info(&vpac270_ohci_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static inline void vpac270_uhc_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * USB Gadget
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static struct gpiod_lookup_table vpac270_gpio_vbus_gpiod_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .dev_id = "gpio-vbus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) GPIO_LOOKUP("gpio-pxa", GPIO41_VPAC270_UDC_DETECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) "vbus", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static struct platform_device vpac270_gpio_vbus = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .name = "gpio-vbus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static void vpac270_udc_command(int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (cmd == PXA2XX_UDC_CMD_CONNECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) UP2OCR = UP2OCR_HXOE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static struct pxa2xx_udc_mach_info vpac270_udc_info __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .udc_command = vpac270_udc_command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .gpio_pullup = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static void __init vpac270_udc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) pxa_set_udc_info(&vpac270_udc_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) gpiod_add_lookup_table(&vpac270_gpio_vbus_gpiod_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) platform_device_register(&vpac270_gpio_vbus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static inline void vpac270_udc_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * Ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static struct resource vpac270_dm9000_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .start = PXA_CS2_PHYS + 0x300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .end = PXA_CS2_PHYS + 0x303,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .start = PXA_CS2_PHYS + 0x304,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .end = PXA_CS2_PHYS + 0x343,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .start = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .end = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static struct dm9000_plat_data vpac270_dm9000_platdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .flags = DM9000_PLATF_32BITONLY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static struct platform_device vpac270_dm9000_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .name = "dm9000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .num_resources = ARRAY_SIZE(vpac270_dm9000_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .resource = vpac270_dm9000_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .platform_data = &vpac270_dm9000_platdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static void __init vpac270_eth_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) platform_device_register(&vpac270_dm9000_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) static inline void vpac270_eth_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * Audio and Touchscreen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .reset_gpio = 95,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) static struct ucb1400_pdata vpac270_ucb1400_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .irq = PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) static struct platform_device vpac270_ucb1400_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .name = "ucb1400_core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .platform_data = &vpac270_ucb1400_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) static void __init vpac270_ts_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) pxa_set_ac97_info(&vpac270_ac97_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) platform_device_register(&vpac270_ucb1400_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static inline void vpac270_ts_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) static struct i2c_board_info __initdata vpac270_i2c_devs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) I2C_BOARD_INFO("ds1339", 0x68),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static void __init vpac270_rtc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) i2c_register_board_info(0, ARRAY_AND_SIZE(vpac270_i2c_devs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static inline void vpac270_rtc_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * Framebuffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static struct pxafb_mode_info vpac270_lcd_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .pixclock = 57692,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .xres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .bpp = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .depth = 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .left_margin = 144,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .right_margin = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .upper_margin = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .lower_margin = 30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .hsync_len = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .vsync_len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }, { /* CRT 640x480 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .pixclock = 35000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .xres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .depth = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) .left_margin = 96,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .right_margin = 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .upper_margin = 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .lower_margin = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .hsync_len = 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .vsync_len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }, { /* CRT 800x600 H=30kHz V=48HZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .pixclock = 25000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .xres = 800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .yres = 600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .depth = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .left_margin = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .right_margin = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .upper_margin = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .lower_margin = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .hsync_len = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .vsync_len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) }, { /* CRT 1024x768 H=40kHz V=50Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .pixclock = 15000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .xres = 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) .yres = 768,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .depth = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .left_margin = 220,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .right_margin = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .upper_margin = 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .lower_margin = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .hsync_len = 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) .vsync_len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static struct pxafb_mach_info vpac270_lcd_screen = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .modes = vpac270_lcd_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .num_modes = ARRAY_SIZE(vpac270_lcd_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) .lcd_conn = LCD_COLOR_TFT_18BPP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) static void vpac270_lcd_power(int on, struct fb_var_screeninfo *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) gpio_set_value(GPIO81_VPAC270_BKL_ON, on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static void __init vpac270_lcd_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) ret = gpio_request(GPIO81_VPAC270_BKL_ON, "BKL-ON");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) pr_err("Requesting BKL-ON GPIO failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) ret = gpio_direction_output(GPIO81_VPAC270_BKL_ON, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) pr_err("Setting BKL-ON GPIO direction failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) vpac270_lcd_screen.pxafb_lcd_power = vpac270_lcd_power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) pxa_set_fb_info(NULL, &vpac270_lcd_screen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) err2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) gpio_free(GPIO81_VPAC270_BKL_ON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static inline void vpac270_lcd_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) * PATA IDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) #if defined(CONFIG_PATA_PXA) || defined(CONFIG_PATA_PXA_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static struct pata_pxa_pdata vpac270_pata_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .reg_shift = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) .dma_dreq = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) .irq_flags = IRQF_TRIGGER_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static struct resource vpac270_ide_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) [0] = { /* I/O Base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) .start = PXA_CS3_PHYS + 0x120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) .end = PXA_CS3_PHYS + 0x13f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) .flags = IORESOURCE_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) [1] = { /* CTL Base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .start = PXA_CS3_PHYS + 0x15c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .end = PXA_CS3_PHYS + 0x15f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .flags = IORESOURCE_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) [2] = { /* DMA Base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .start = PXA_CS3_PHYS + 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) .end = PXA_CS3_PHYS + 0x2f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .flags = IORESOURCE_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) [3] = { /* IDE IRQ pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .start = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) .end = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) .flags = IORESOURCE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static struct platform_device vpac270_ide_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .name = "pata_pxa",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) .num_resources = ARRAY_SIZE(vpac270_ide_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .resource = vpac270_ide_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) .platform_data = &vpac270_pata_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static void __init vpac270_ide_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) platform_device_register(&vpac270_ide_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static inline void vpac270_ide_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) * Core power regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) #if defined(CONFIG_REGULATOR_MAX1586) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) defined(CONFIG_REGULATOR_MAX1586_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static struct regulator_consumer_supply vpac270_max1587a_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) REGULATOR_SUPPLY("vcc_core", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static struct regulator_init_data vpac270_max1587a_v3_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .name = "vcc_core range",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .min_uV = 900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .max_uV = 1705000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .consumer_supplies = vpac270_max1587a_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) .num_consumer_supplies = ARRAY_SIZE(vpac270_max1587a_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static struct max1586_subdev_data vpac270_max1587a_subdevs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) .name = "vcc_core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .id = MAX1586_V3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .platform_data = &vpac270_max1587a_v3_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static struct max1586_platform_data vpac270_max1587a_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .subdevs = vpac270_max1587a_subdevs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .num_subdevs = ARRAY_SIZE(vpac270_max1587a_subdevs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static struct i2c_board_info __initdata vpac270_pi2c_board_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) I2C_BOARD_INFO("max1586", 0x14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .platform_data = &vpac270_max1587a_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static void __init vpac270_pmic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) i2c_register_board_info(1, ARRAY_AND_SIZE(vpac270_pi2c_board_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) static inline void vpac270_pmic_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * Machine init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static void __init vpac270_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) pxa2xx_mfp_config(ARRAY_AND_SIZE(vpac270_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) pxa_set_ffuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) pxa_set_btuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) pxa_set_stuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) pxa_set_i2c_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) pxa27x_set_i2c_power_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) vpac270_pmic_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) vpac270_lcd_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) vpac270_mmc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) vpac270_nor_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) vpac270_onenand_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) vpac270_leds_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) vpac270_keys_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) vpac270_uhc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) vpac270_udc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) vpac270_eth_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) vpac270_ts_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) vpac270_rtc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) vpac270_ide_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) regulator_has_full_constraints();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) MACHINE_START(VPAC270, "Voipac PXA270")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .map_io = pxa27x_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .nr_irqs = PXA_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .init_irq = pxa27x_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) .handle_irq = pxa27x_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) .init_time = pxa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .init_machine = vpac270_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .restart = pxa_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) MACHINE_END