^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-pxa/viper.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Support for the Arcom VIPER SBC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Ian Campbell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Created: Feb 03, 2003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright: Arcom Control Systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Maintained by Marc Zyngier <maz@misterjones.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * <marc.zyngier@altran.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Based on lubbock.c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Author: Nicolas Pitre
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Created: Jun 15, 2001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Copyright: MontaVista Software Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/major.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/platform_data/i2c-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/platform_data/i2c-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/smc91x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/pwm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/pwm_backlight.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/usb/isp116x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/syscore_ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include "pxa25x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <mach/audio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/platform_data/video-pxafb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <mach/regs-uart.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/platform_data/pcmcia-pxa2xx_viper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include "viper.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <asm/system_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static unsigned int icr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static void viper_icr_set_bit(unsigned int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) icr |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) VIPER_ICR = icr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void viper_icr_clear_bit(unsigned int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) icr &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) VIPER_ICR = icr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* This function is used from the pcmcia module to reset the CF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void viper_cf_reset(int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) viper_icr_set_bit(VIPER_ICR_CF_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) viper_icr_clear_bit(VIPER_ICR_CF_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static struct arcom_pcmcia_pdata viper_pcmcia_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .cd_gpio = VIPER_CF_CD_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .rdy_gpio = VIPER_CF_RDY_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .pwr_gpio = VIPER_CF_POWER_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .reset = viper_cf_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static struct platform_device viper_pcmcia_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .name = "viper-pcmcia",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .platform_data = &viper_pcmcia_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * The CPLD version register was not present on VIPER boards prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * v2i1. On v1 boards where the version register is not present we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * will just read back the previous value from the databus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Therefore we do two reads. The first time we write 0 to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * (read-only) register before reading and the second time we write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * 0xff first. If the two reads do not match or they read back as 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * or 0x00 then we have version 1 hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static u8 viper_hw_version(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u8 v1, v2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) VIPER_VERSION = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) v1 = VIPER_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) VIPER_VERSION = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) v2 = VIPER_VERSION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return v1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* CPU system core operations. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int viper_cpu_suspend(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) viper_icr_set_bit(VIPER_ICR_R_DIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static void viper_cpu_resume(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) viper_icr_clear_bit(VIPER_ICR_R_DIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static struct syscore_ops viper_cpu_syscore_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .suspend = viper_cpu_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .resume = viper_cpu_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static unsigned int current_voltage_divisor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * If force is not true then step from existing to new divisor. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * force is true then jump straight to the new divisor. Stepping is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * used because if the jump in voltage is too large, the VCC can dip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * too low and the regulator cuts out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * force can be used to initialize the divisor to a know state by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * setting the value for the current clock speed, since we are already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * running at that speed we know the voltage should be pretty close so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * the jump won't be too large
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static void viper_set_core_cpu_voltage(unsigned long khz, int force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) unsigned int divisor = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) const char *v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (khz < 200000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) v = "1.0"; divisor = 0xfff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) } else if (khz < 300000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) v = "1.1"; divisor = 0xde5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) v = "1.3"; divisor = 0x325;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) v, (int)khz / 1000, (int)khz % 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define STEP 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) int step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) step = divisor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) else if (current_voltage_divisor < divisor - STEP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) step = current_voltage_divisor + STEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) else if (current_voltage_divisor > divisor + STEP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) step = current_voltage_divisor - STEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) step = divisor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) force = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) for (i = 1 << 11 ; i > 0 ; i >>= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) current_voltage_divisor = step;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) } while (current_voltage_divisor != divisor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* Interrupt handling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static unsigned long viper_irq_enabled_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static const int viper_isa_irq_map[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 0, /* ISA irq #0, invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 0, /* ISA irq #1, invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 0, /* ISA irq #2, invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 1 << 0, /* ISA irq #3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 1 << 1, /* ISA irq #4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 1 << 2, /* ISA irq #5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 1 << 3, /* ISA irq #6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 1 << 4, /* ISA irq #7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 0, /* ISA irq #8, invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 1 << 8, /* ISA irq #9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 1 << 5, /* ISA irq #10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 1 << 6, /* ISA irq #11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 1 << 7, /* ISA irq #12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 0, /* ISA irq #13, invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 1 << 9, /* ISA irq #14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 1 << 10, /* ISA irq #15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static inline int viper_irq_to_bitmask(unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static inline int viper_bit_to_irq(int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static void viper_ack_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) int viper_irq = viper_irq_to_bitmask(d->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (viper_irq & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) VIPER_LO_IRQ_STATUS = viper_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static void viper_mask_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static void viper_unmask_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static inline unsigned long viper_irq_pending(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) viper_irq_enabled_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static void viper_irq_handler(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) unsigned long pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) pending = viper_irq_pending();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* we're in a chained irq handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * so ack the interrupt by hand */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) desc->irq_data.chip->irq_ack(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (likely(pending)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) irq = viper_bit_to_irq(__ffs(pending));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) generic_handle_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) pending = viper_irq_pending();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) } while (pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static struct irq_chip viper_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) .name = "ISA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .irq_ack = viper_ack_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .irq_mask = viper_mask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .irq_unmask = viper_unmask_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static void __init viper_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) int level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) int isa_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) pxa25x_init_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) /* setup ISA IRQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) isa_irq = viper_bit_to_irq(level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) handle_edge_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) viper_irq_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* Flat Panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static struct pxafb_mode_info fb_mode_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .pixclock = 157500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .xres = 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .yres = 240,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .hsync_len = 63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .left_margin = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .right_margin = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .vsync_len = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .upper_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .lower_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .sync = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static struct pxafb_mach_info fb_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .modes = fb_mode_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .num_modes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static struct pwm_lookup viper_pwm_lookup[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) PWM_LOOKUP("pxa25x-pwm.0", 0, "pwm-backlight.0", NULL, 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) PWM_POLARITY_NORMAL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static int viper_backlight_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /* GPIO9 and 10 control FB backlight. Initialise to off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) goto err_request_bckl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) goto err_request_lcd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) goto err_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) goto err_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) err_dir:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) gpio_free(VIPER_LCD_EN_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) err_request_lcd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) gpio_free(VIPER_BCKLIGHT_EN_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) err_request_bckl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) dev_err(dev, "Failed to setup LCD GPIOs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static int viper_backlight_notify(struct device *dev, int brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return brightness;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static void viper_backlight_exit(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) gpio_free(VIPER_LCD_EN_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) gpio_free(VIPER_BCKLIGHT_EN_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static struct platform_pwm_backlight_data viper_backlight_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .max_brightness = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .dft_brightness = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .init = viper_backlight_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .notify = viper_backlight_notify,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .exit = viper_backlight_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static struct platform_device viper_backlight_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .name = "pwm-backlight",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .parent = &pxa25x_device_pwm0.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .platform_data = &viper_backlight_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /* Ethernet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static struct resource smc91x_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .name = "smc91x-regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .start = VIPER_ETH_PHYS + 0x300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .end = VIPER_ETH_PHYS + 0x30f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .name = "smc91x-data32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .start = VIPER_ETH_DATA_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .end = VIPER_ETH_DATA_PHYS + 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) static struct smc91x_platdata viper_smc91x_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .leda = RPC_LED_100_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .ledb = RPC_LED_TX_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static struct platform_device smc91x_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .name = "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .num_resources = ARRAY_SIZE(smc91x_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .resource = smc91x_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .platform_data = &viper_smc91x_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* i2c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) static struct gpiod_lookup_table viper_i2c_gpiod_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .dev_id = "i2c-gpio.1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SDA_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) GPIO_LOOKUP_IDX("gpio-pxa", VIPER_RTC_I2C_SCL_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) static struct i2c_gpio_platform_data i2c_bus_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .udelay = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .timeout = HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static struct platform_device i2c_bus_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .name = "i2c-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .platform_data = &i2c_bus_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static struct i2c_board_info __initdata viper_i2c_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) I2C_BOARD_INFO("ds1338", 0x68),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) * Serial configuration:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) * You can either have the standard PXA ports driven by the PXA driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) * or all the ports (PXA + 16850) driven by the 8250 driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) * Choose your poison.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static struct resource viper_serial_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #ifndef CONFIG_SERIAL_PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .start = 0x40100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .end = 0x4010001f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .start = 0x40200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .end = 0x4020001f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .start = 0x40700000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .end = 0x4070001f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) .start = VIPER_UARTA_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .end = VIPER_UARTA_PHYS + 0xf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .start = VIPER_UARTB_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .end = VIPER_UARTB_PHYS + 0xf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static struct plat_serial8250_port serial_platform_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) #ifndef CONFIG_SERIAL_PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /* Internal UARTs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .membase = (void *)&FFUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .mapbase = __PREG(FFUART),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .irq = IRQ_FFUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .uartclk = 921600 * 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) .regshift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .membase = (void *)&BTUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .mapbase = __PREG(BTUART),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .irq = IRQ_BTUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .uartclk = 921600 * 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .regshift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .membase = (void *)&STUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .mapbase = __PREG(STUART),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) .irq = IRQ_STUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .uartclk = 921600 * 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .regshift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* External UARTs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .mapbase = VIPER_UARTA_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) .irqflags = IRQF_TRIGGER_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) .uartclk = 1843200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) .regshift = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .mapbase = VIPER_UARTB_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) .irqflags = IRQF_TRIGGER_RISING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .uartclk = 1843200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .regshift = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .iotype = UPIO_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) UPF_SKIP_TEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static struct platform_device serial_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .name = "serial8250",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) .platform_data = serial_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) .num_resources = ARRAY_SIZE(viper_serial_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) .resource = viper_serial_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* USB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) static void isp116x_delay(struct device *dev, int delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) ndelay(delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static struct resource isp116x_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) [0] = { /* DATA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) .start = VIPER_USB_PHYS + 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) .end = VIPER_USB_PHYS + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) [1] = { /* ADDR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) .start = VIPER_USB_PHYS + 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) .end = VIPER_USB_PHYS + 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static struct isp116x_platform_data isp116x_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) /* Enable internal resistors on downstream ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .sel15Kres = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /* On-chip overcurrent protection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .oc_enable = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) /* INT output polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) .int_act_high = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) /* INT edge or level triggered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .int_edge_triggered = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) /* WAKEUP pin connected - NOT SUPPORTED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) /* .remote_wakeup_connected = 0, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) /* Wakeup by devices on usb bus enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .remote_wakeup_enable = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) .delay = isp116x_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static struct platform_device isp116x_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .name = "isp116x-hcd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) .num_resources = ARRAY_SIZE(isp116x_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) .resource = isp116x_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .platform_data = &isp116x_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) /* MTD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static struct resource mtd_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) [0] = { /* RedBoot config + filesystem flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .start = VIPER_FLASH_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .end = VIPER_FLASH_PHYS + SZ_32M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) [1] = { /* Boot flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) .start = VIPER_BOOT_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .end = VIPER_BOOT_PHYS + SZ_1M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) [2] = { /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * SRAM size is actually 256KB, 8bits, with a sparse mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) * (each byte is on a 16bit boundary).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) .start = _VIPER_SRAM_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .end = _VIPER_SRAM_BASE + SZ_512K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) static struct mtd_partition viper_boot_flash_partition = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) .name = "RedBoot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .size = SZ_1M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .mask_flags = MTD_WRITEABLE, /* force R/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static struct physmap_flash_data viper_flash_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .parts = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .nr_parts = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .parts = &viper_boot_flash_partition,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .nr_parts = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static struct platform_device viper_mtd_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) .platform_data = &viper_flash_data[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) .resource = &mtd_resources[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) .platform_data = &viper_flash_data[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) .resource = &mtd_resources[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) static struct platform_device *viper_devs[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) &smc91x_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) &i2c_bus_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) &serial_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) &isp116x_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) &viper_mtd_devices[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) &viper_mtd_devices[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) &viper_backlight_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) &viper_pcmcia_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) static mfp_cfg_t viper_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) /* Chip selects */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) GPIO15_nCS_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) GPIO78_nCS_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) GPIO79_nCS_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) GPIO80_nCS_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) GPIO33_nCS_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) /* AC97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) GPIO28_AC97_BITCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) GPIO29_AC97_SDATA_IN_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) GPIO30_AC97_SDATA_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) GPIO31_AC97_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) /* FP Backlight */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) GPIO16_PWM0_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) /* Ethernet PHY Ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) GPIO18_RDY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) /* Serial shutdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) /* Compact-Flash / PC104 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) GPIO48_nPOE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) GPIO49_nPWE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) GPIO50_nPIOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) GPIO51_nPIOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) GPIO52_nPCE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) GPIO53_nPCE_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) GPIO54_nPSKTSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) GPIO55_nPREG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) GPIO56_nPWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) GPIO57_nIOIS16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) /* Integrated UPS control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) GPIO20_GPIO, /* VIPER_UPS_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) /* Vcc regulator control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /* i2c busses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) /* PC/104 Interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) static unsigned long viper_tpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) static int __init viper_tpm_setup(char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return kstrtoul(str, 10, &viper_tpm) >= 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) __setup("tpm=", viper_tpm_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) struct gpiod_lookup_table viper_tpm_i2c_gpiod_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) .dev_id = "i2c-gpio.2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SDA_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) GPIO_LOOKUP_IDX("gpio-pxa", VIPER_TPM_I2C_SCL_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) static void __init viper_tpm_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) struct platform_device *tpm_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) struct i2c_gpio_platform_data i2c_tpm_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .udelay = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .timeout = HZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) char *errstr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) /* Allocate TPM i2c bus if requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (!viper_tpm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) gpiod_add_lookup_table(&viper_tpm_i2c_gpiod_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) tpm_device = platform_device_alloc("i2c-gpio", 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if (tpm_device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (!platform_device_add_data(tpm_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) &i2c_tpm_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) sizeof(i2c_tpm_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) if (platform_device_add(tpm_device)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) errstr = "register TPM i2c bus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) goto error_free_tpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) errstr = "allocate TPM i2c bus data";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) goto error_free_tpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) errstr = "allocate TPM i2c device";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) goto error_tpm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) error_free_tpm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) kfree(tpm_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) error_tpm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) pr_err("viper: Couldn't %s, giving up\n", errstr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) static void __init viper_init_vcore_gpios(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) goto err_request_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) goto err_request_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) goto err_request_cs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) goto err_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) /* c/should assume redboot set the correct level ??? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) err_dir:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) gpio_free(VIPER_PSU_nCS_LD_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) err_request_cs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) gpio_free(VIPER_PSU_CLK_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) err_request_clk:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) gpio_free(VIPER_PSU_DATA_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) err_request_data:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) pr_err("viper: Failed to setup vcore control GPIOs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) static void __init viper_init_serial_gpio(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) goto err_request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) goto err_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) err_dir:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) gpio_free(VIPER_UART_SHDN_GPIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) err_request:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) pr_err("viper: Failed to setup UART shutdown GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) #ifdef CONFIG_CPU_FREQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) static int viper_cpufreq_notifier(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) unsigned long val, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) struct cpufreq_freqs *freq = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) /* TODO: Adjust timings??? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) case CPUFREQ_PRECHANGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) if (freq->old < freq->new) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) /* we are getting faster so raise the voltage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) * before we change freq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) viper_set_core_cpu_voltage(freq->new, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) case CPUFREQ_POSTCHANGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) if (freq->old > freq->new) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) /* we are slowing down so drop the power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) * after we change freq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) viper_set_core_cpu_voltage(freq->new, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) /* ignore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) static struct notifier_block viper_cpufreq_notifier_block = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) .notifier_call = viper_cpufreq_notifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static void __init viper_init_cpufreq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) CPUFREQ_TRANSITION_NOTIFIER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) pr_err("viper: Failed to setup cpufreq notifier\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) static inline void viper_init_cpufreq(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) static void viper_power_off(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) pr_notice("Shutting off UPS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) gpio_set_value(VIPER_UPS_GPIO, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) /* Spin to death... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) while (1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) static void __init viper_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) pm_power_off = viper_power_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) pxa_set_ffuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) pxa_set_btuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) pxa_set_stuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) /* Wake-up serial console */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) viper_init_serial_gpio();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) pxa_set_fb_info(NULL, &fb_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) /* v1 hardware cannot use the datacs line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) version = viper_hw_version();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) if (version == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) smc91x_device.num_resources--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) pxa_set_i2c_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) gpiod_add_lookup_table(&viper_i2c_gpiod_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) pwm_add_table(viper_pwm_lookup, ARRAY_SIZE(viper_pwm_lookup));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) viper_init_vcore_gpios();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) viper_init_cpufreq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) register_syscore_ops(&viper_cpu_syscore_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (version) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) pr_info("viper: hardware v%di%d detected. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) "CPLD revision %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) VIPER_BOARD_VERSION(version),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) VIPER_BOARD_ISSUE(version),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) VIPER_CPLD_REVISION(version));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) system_rev = (VIPER_BOARD_VERSION(version) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) (VIPER_BOARD_ISSUE(version) << 4) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) VIPER_CPLD_REVISION(version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) pr_info("viper: No version register.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) viper_tpm_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) pxa_set_ac97_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) static struct map_desc viper_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) .virtual = VIPER_CPLD_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) .length = 0x00300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) .virtual = VIPER_PC104IO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) .pfn = __phys_to_pfn(0x30000000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) .length = 0x00800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) static void __init viper_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) pxa25x_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) PCFR |= PCFR_OPDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) /* Maintainer: Marc Zyngier <maz@misterjones.org> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) .map_io = viper_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) .nr_irqs = PXA_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) .init_irq = viper_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) .handle_irq = pxa25x_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) .init_time = pxa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) .init_machine = viper_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) .restart = pxa_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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