^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-pxa/trizeps4.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Support for the Keith und Koep Trizeps4 Module Platform.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Jürgen Schindele
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Created: 20 02, 2006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright: Jürgen Schindele
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/dm9000.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/platform_data/i2c-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include "pxa27x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <mach/trizeps4.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <mach/audio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/platform_data/video-pxafb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/platform_data/mmc-pxamci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/platform_data/irda-pxaficp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/platform_data/usb-ohci-pxa27x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <mach/smemc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* comment out the following line if you want to use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * Standard UART from PXA for serial / irda transmission
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * and acivate it if you have status leds connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define STATUS_LEDS_ON_STUART_PINS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * MultiFunctionPins of CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static unsigned long trizeps4_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* Chip Selects */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) GPIO15_nCS_1, /* DiskOnChip CS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) GPIO93_GPIO, /* TRIZEPS4_DOC_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) GPIO94_GPIO, /* DOC lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) GPIO78_nCS_2, /* DM9000 CS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) GPIO101_GPIO, /* TRIZEPS4_ETH_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) GPIO79_nCS_3, /* Logic CS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) GPIO0_GPIO | WAKEUP_ON_EDGE_RISE, /* Logic irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* AC97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) GPIO28_AC97_BITCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) GPIO29_AC97_SDATA_IN_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) GPIO30_AC97_SDATA_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) GPIO31_AC97_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* LCD - 16bpp Active TFT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) GPIOxx_LCD_TFT_16BPP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* UART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) GPIO9_FFUART_CTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) GPIO10_FFUART_DCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) GPIO16_FFUART_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) GPIO33_FFUART_DSR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) GPIO38_FFUART_RI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) GPIO82_FFUART_DTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) GPIO83_FFUART_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) GPIO96_FFUART_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) GPIO42_BTUART_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) GPIO43_BTUART_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) GPIO44_BTUART_CTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) GPIO45_BTUART_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #ifdef STATUS_LEDS_ON_STUART_PINS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) GPIO46_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) GPIO47_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) GPIO46_STUART_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) GPIO47_STUART_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* PCMCIA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) GPIO11_GPIO, /* TRIZEPS4_CD_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) GPIO13_GPIO, /* TRIZEPS4_READY_NINT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) GPIO48_nPOE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) GPIO49_nPWE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) GPIO50_nPIOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) GPIO51_nPIOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) GPIO54_nPCE_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) GPIO55_nPREG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) GPIO56_nPWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) GPIO57_nIOIS16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) GPIO102_nPCE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) GPIO104_PSKTSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* MultiMediaCard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) GPIO32_MMC_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) GPIO92_MMC_DAT_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) GPIO109_MMC_DAT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) GPIO110_MMC_DAT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) GPIO111_MMC_DAT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) GPIO112_MMC_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) GPIO12_GPIO, /* TRIZEPS4_MMC_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* USB OHCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) GPIO88_USBH1_PWR, /* USBHPWR1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) GPIO89_USBH1_PEN, /* USBHPEN1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) GPIO117_I2C_SCL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) GPIO118_I2C_SDA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static unsigned long trizeps4wl_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* SSP 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) GPIO14_SSP2_SFRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) GPIO19_SSP2_SCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) GPIO53_GPIO, /* TRIZEPS4_SPI_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) GPIO86_SSP2_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) GPIO87_SSP2_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * ONBOARD FLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static struct mtd_partition trizeps4_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .name = "Bootloader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .offset = 0x00000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .size = 0x00040000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .mask_flags = MTD_WRITEABLE /* force read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .name = "Backup",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .offset = 0x00040000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .size = 0x00040000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .name = "Image",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .offset = 0x00080000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .size = 0x01080000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .name = "IPSM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .offset = 0x01100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .size = 0x00e00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .name = "Registry",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .offset = 0x01f00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static struct physmap_flash_data trizeps4_flash_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .width = 4, /* bankwidth in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .parts = trizeps4_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .nr_parts = ARRAY_SIZE(trizeps4_partitions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static struct resource flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .start = PXA_CS0_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .end = PXA_CS0_PHYS + SZ_32M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static struct platform_device flash_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .platform_data = trizeps4_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .resource = &flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * DAVICOM DM9000 Ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static struct resource dm9000_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .start = TRIZEPS4_ETH_PHYS+0x300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .end = TRIZEPS4_ETH_PHYS+0x400-1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .start = TRIZEPS4_ETH_PHYS+0x8300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .end = TRIZEPS4_ETH_PHYS+0x8400-1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .start = TRIZEPS4_ETH_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .end = TRIZEPS4_ETH_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static struct dm9000_plat_data tri_dm9000_platdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .flags = DM9000_PLATF_32BITONLY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static struct platform_device dm9000_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .name = "dm9000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .num_resources = ARRAY_SIZE(dm9000_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .resource = dm9000_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .platform_data = &tri_dm9000_platdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * LED's on GPIO pins of PXA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static struct gpio_led trizeps4_led[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #ifdef STATUS_LEDS_ON_STUART_PINS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .name = "led0:orange:heartbeat", /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .default_trigger = "heartbeat",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .gpio = GPIO_HEARTBEAT_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .name = "led1:yellow:cpubusy", /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .default_trigger = "cpu-busy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .gpio = GPIO_SYS_BUSY_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static struct gpio_led_platform_data trizeps4_led_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .leds = trizeps4_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .num_leds = ARRAY_SIZE(trizeps4_led),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static struct platform_device leds_devices = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .platform_data = &trizeps4_led_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static struct platform_device *trizeps4_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) &flash_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) &dm9000_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) &leds_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static struct platform_device *trizeps4wl_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) &flash_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) &leds_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static short trizeps_conxs_bcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /* PCCARD power switching supports only 3,3V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) void board_pcmcia_power(int power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (power) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* switch power on, put in reset and enable buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) trizeps_conxs_bcr |= power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) trizeps_conxs_bcr &= ~ConXS_BCR_CF_BUF_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) BCR_writew(trizeps_conxs_bcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /* wait a little */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) udelay(2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* take reset away */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) trizeps_conxs_bcr &= ~ConXS_BCR_CF_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) BCR_writew(trizeps_conxs_bcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) udelay(2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* put in reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) BCR_writew(trizeps_conxs_bcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) udelay(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* switch power off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) trizeps_conxs_bcr &= ~0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) BCR_writew(trizeps_conxs_bcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) pr_debug("%s: o%s 0x%x\n", __func__, power ? "n" : "ff",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) trizeps_conxs_bcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) EXPORT_SYMBOL(board_pcmcia_power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* backlight power switching for LCD panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static void board_backlight_power(int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) pr_debug("%s: o%s 0x%x\n", __func__, on ? "n" : "ff",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) trizeps_conxs_bcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) BCR_writew(trizeps_conxs_bcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* a I2C based RTC is known on CONXS board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static struct i2c_board_info trizeps4_i2c_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) { I2C_BOARD_INFO("rtc-pcf8593", 0x51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * MMC card slot external to module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) IRQF_TRIGGER_RISING, "MMC card detect", data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) "MMC card detect IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static void trizeps4_mci_exit(struct device *dev, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) free_irq(TRIZEPS4_MMC_IRQ, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static struct pxamci_platform_data trizeps4_mci_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .detect_delay_ms= 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .init = trizeps4_mci_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .exit = trizeps4_mci_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .get_ro = NULL, /* write-protection not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .setpower = NULL, /* power-switching not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * IRDA mode switching on stuart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #ifndef STATUS_LEDS_ON_STUART_PINS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static short trizeps_conxs_ircr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static int trizeps4_irda_startup(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) IRCR_writew(trizeps_conxs_ircr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static void trizeps4_irda_shutdown(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) trizeps_conxs_ircr |= ConXS_IRCR_SD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) IRCR_writew(trizeps_conxs_ircr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static void trizeps4_irda_transceiver_mode(struct device *dev, int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* Switch mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (mode & IR_SIRMODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) trizeps_conxs_ircr &= ~ConXS_IRCR_MODE; /* Slow mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) else if (mode & IR_FIRMODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) trizeps_conxs_ircr |= ConXS_IRCR_MODE; /* Fast mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) /* Switch power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (mode & IR_OFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) trizeps_conxs_ircr |= ConXS_IRCR_SD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) IRCR_writew(trizeps_conxs_ircr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) pxa2xx_transceiver_mode(dev, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .gpio_pwdown = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .transceiver_mode = trizeps4_irda_transceiver_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .startup = trizeps4_irda_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .shutdown = trizeps4_irda_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * OHCI USB port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .port_mode = PMM_PERPORT_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static struct map_desc trizeps4_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) { /* ConXS CFSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .virtual = TRIZEPS4_CFSR_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .length = 0x00001000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) { /* ConXS BCR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .virtual = TRIZEPS4_BOCR_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .length = 0x00001000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) { /* ConXS IRCR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .virtual = TRIZEPS4_IRCR_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .length = 0x00001000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) { /* ConXS DCR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .virtual = TRIZEPS4_DICR_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .length = 0x00001000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) { /* ConXS UPSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .virtual = TRIZEPS4_UPSR_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .length = 0x00001000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static struct pxafb_mode_info sharp_lcd_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .pixclock = 78000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .xres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .bpp = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .hsync_len = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .left_margin = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .right_margin = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .vsync_len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .upper_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .lower_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .cmap_greyscale = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) static struct pxafb_mach_info sharp_lcd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) .modes = &sharp_lcd_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) .num_modes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .cmap_inverse = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .cmap_static = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .pxafb_backlight_power = board_backlight_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static struct pxafb_mode_info toshiba_lcd_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .pixclock = 39720,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .xres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .bpp = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .hsync_len = 63,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .left_margin = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .right_margin = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .vsync_len = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) .upper_margin = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .lower_margin = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .sync = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .cmap_greyscale = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static struct pxafb_mach_info toshiba_lcd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .modes = &toshiba_lcd_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .num_modes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .lcd_conn = (LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .cmap_inverse = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .cmap_static = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) .pxafb_backlight_power = board_backlight_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static void __init trizeps4_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (machine_is_trizeps4wl()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) pxa2xx_mfp_config(ARRAY_AND_SIZE(trizeps4wl_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) platform_add_devices(trizeps4wl_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) ARRAY_SIZE(trizeps4wl_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) platform_add_devices(trizeps4_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ARRAY_SIZE(trizeps4_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) pxa_set_ffuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) pxa_set_btuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) pxa_set_stuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if (0) /* dont know how to determine LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) pxa_set_fb_info(NULL, &sharp_lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) pxa_set_fb_info(NULL, &toshiba_lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) pxa_set_mci_info(&trizeps4_mci_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) #ifndef STATUS_LEDS_ON_STUART_PINS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) pxa_set_ficp_info(&trizeps4_ficp_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) pxa_set_ohci_info(&trizeps4_ohci_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) pxa_set_ac97_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) pxa_set_i2c_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) i2c_register_board_info(0, trizeps4_i2c_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) ARRAY_SIZE(trizeps4_i2c_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) /* this is the reset value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) trizeps_conxs_bcr = 0x00A0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) BCR_writew(trizeps_conxs_bcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) board_backlight_power(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) regulator_has_full_constraints();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) static void __init trizeps4_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) pxa27x_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if ((__raw_readl(MSC0) & 0x8) && (__raw_readl(BOOT_DEF) & 0x1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* if flash is 16 bit wide its a Trizeps4 WL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) __machine_arch_type = MACH_TYPE_TRIZEPS4WL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) trizeps4_flash_data[0].width = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) /* if flash is 32 bit wide its a Trizeps4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) __machine_arch_type = MACH_TYPE_TRIZEPS4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) trizeps4_flash_data[0].width = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /* MAINTAINER("Jürgen Schindele") */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .init_machine = trizeps4_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .map_io = trizeps4_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) .nr_irqs = PXA_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) .init_irq = pxa27x_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .handle_irq = pxa27x_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .init_time = pxa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) .restart = pxa_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) MACHINE_END
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) /* MAINTAINER("Jürgen Schindele") */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) .init_machine = trizeps4_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) .map_io = trizeps4_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .nr_irqs = PXA_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .init_irq = pxa27x_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) .handle_irq = pxa27x_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .init_time = pxa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .restart = pxa_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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