^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/proc-fns.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/system_misc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <mach/regs-ost.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <mach/reset.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <mach/smemc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) unsigned int reset_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) EXPORT_SYMBOL(reset_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static void do_hw_reset(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static int reset_gpio = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) int init_gpio_reset(int gpio, int output, int level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) rc = gpio_request(gpio, "reset generator");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) printk(KERN_ERR "Can't request reset_gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) if (output)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) rc = gpio_direction_output(gpio, level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) rc = gpio_direction_input(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) printk(KERN_ERR "Can't configure reset_gpio\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) gpio_free(gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (!rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) reset_gpio = gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Trigger GPIO reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * This covers various types of logic connecting gpio pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * to RESET pins (nRESET or GPIO_RESET):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static void do_gpio_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) BUG_ON(reset_gpio == -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* drive it low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) gpio_direction_output(reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) mdelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* rising edge or drive high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) gpio_set_value(reset_gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) mdelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* falling edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) gpio_set_value(reset_gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* give it some time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) mdelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) WARN_ON(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* fallback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) do_hw_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static void do_hw_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* Initialize the watchdog and let it fire */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) writel_relaxed(OWER_WME, OWER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) writel_relaxed(OSSR_M3, OSSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* ... in 100 ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * we put SDRAM into self-refresh to prevent that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) while (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) writel_relaxed(MDREFR_SLFRSH, MDREFR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) void pxa_restart(enum reboot_mode mode, const char *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) local_fiq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) clear_reset_status(RESET_STATUS_ALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case REBOOT_SOFT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* Jump into ROM at address 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) soft_restart(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) case REBOOT_GPIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) do_gpio_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) case REBOOT_HARD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) do_hw_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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