Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * GPIOs and interrupts for Palm Zire72 Handheld Computer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Authors:	Alex Osborne <bobofdoom@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *		Jan Herman <2hp@seznam.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *		Sergey Lapin <slapin@ossfans.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _INCLUDE_PALMZ72_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _INCLUDE_PALMZ72_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* Power and control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define GPIO_NR_PALMZ72_GPIO_RESET		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define GPIO_NR_PALMZ72_POWER_DETECT		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* SD/MMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define GPIO_NR_PALMZ72_SD_DETECT_N		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define GPIO_NR_PALMZ72_SD_POWER_N		98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define GPIO_NR_PALMZ72_SD_RO			115
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Touchscreen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define GPIO_NR_PALMZ72_WM9712_IRQ		27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* IRDA -  disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define GPIO_NR_PALMZ72_IR_DISABLE		49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* USB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define GPIO_NR_PALMZ72_USB_DETECT_N		15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define GPIO_NR_PALMZ72_USB_PULLUP		95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* LCD/Backlight */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define GPIO_NR_PALMZ72_BL_POWER		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define GPIO_NR_PALMZ72_LCD_POWER		96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define GPIO_NR_PALMZ72_LED_GREEN		88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* Bluetooth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define GPIO_NR_PALMZ72_BT_POWER		17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define GPIO_NR_PALMZ72_BT_RESET		83
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* Camera */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define GPIO_NR_PALMZ72_CAM_PWDN		56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define GPIO_NR_PALMZ72_CAM_RESET		57
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define GPIO_NR_PALMZ72_CAM_POWER		91
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /** Initial values **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Battery */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PALMZ72_BAT_MAX_VOLTAGE		4000	/* 4.00v current voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PALMZ72_BAT_MIN_VOLTAGE		3550	/* 3.55v critical voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PALMZ72_BAT_MAX_CURRENT		0	/* unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PALMZ72_BAT_MIN_CURRENT		0	/* unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PALMZ72_BAT_MAX_CHARGE		1	/* unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PALMZ72_BAT_MIN_CHARGE		1	/* unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PALMZ72_MAX_LIFE_MINS		360	/* on-life in minutes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Backlight */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PALMZ72_MAX_INTENSITY		0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define PALMZ72_DEFAULT_INTENSITY	0x7E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define PALMZ72_LIMIT_MASK		0x7F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PALMZ72_PRESCALER		0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PALMZ72_PERIOD_NS		3500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct palmz72_resume_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	u32 magic0;		/* 0x0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	u32 magic1;		/* 0x4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	u32 resume_addr;	/* 0x8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	u32 pad[11];		/* 0xc..0x37 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	u32 arm_control;	/* 0x38 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	u32 aux_control;	/* 0x3c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	u32 ttb;		/* 0x40 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	u32 domain_access;	/* 0x44 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	u32 process_id;		/* 0x48 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)