^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Bootloader to resume MIO A701
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * 2007-1-12 Robert Jarzmik
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/assembler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Note: Yes, part of the following code is located into the .data section.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This is to allow jumpaddr to be accessed with a relative load
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * while we can't rely on any MMU translation. We could have put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * sleep_save_sp in the .text section as well, but some setups might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * insist on it to be truly read-only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .align 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ENTRY(mioa701_bootstrap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) b 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ENTRY(mioa701_jumpaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .word 0x40f00008 @ PSPR in no-MMU mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) mov r0, #0xa0000000 @ Don't suppose memory access works
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) orr r0, r0, #0x00200000 @ even if it's supposed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) orr r0, r0, #0x0000b000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) mov r1, #0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) str r1, [r0] @ Early disable resume for next boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ldr r0, mioa701_jumpaddr @ (Murphy's Law)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ldr r0, [r0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ret r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ENTRY(mioa701_bootstrap_lg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .align 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .word 2b-0b