Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * arch/arm/mach-pxa/include/mach/mfp-pxa930.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * PXA930 specific MFP configuration definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2007-2008 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #ifndef __ASM_ARCH_MFP_PXA9xx_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define __ASM_ARCH_MFP_PXA9xx_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "mfp-pxa3xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) /* GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define GPIO46_GPIO		MFP_CFG(GPIO46, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #define GPIO49_GPIO		MFP_CFG(GPIO49, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define GPIO50_GPIO		MFP_CFG(GPIO50, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define GPIO51_GPIO		MFP_CFG(GPIO51, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define GPIO52_GPIO		MFP_CFG(GPIO52, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define GPIO56_GPIO		MFP_CFG(GPIO56, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define GPIO58_GPIO		MFP_CFG(GPIO58, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define GPIO59_GPIO		MFP_CFG(GPIO59, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define GPIO60_GPIO		MFP_CFG(GPIO60, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define GPIO61_GPIO		MFP_CFG(GPIO61, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define GPIO62_GPIO		MFP_CFG(GPIO62, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define GSIM_UCLK_GPIO_79	MFP_CFG(GSIM_UCLK, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define GSIM_UIO_GPIO_80	MFP_CFG(GSIM_UIO, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define GSIM_nURST_GPIO_81	MFP_CFG(GSIM_nURST, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define GSIM_UDET_GPIO_82	MFP_CFG(GSIM_UDET, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define DF_IO15_GPIO_28		MFP_CFG(DF_IO15, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define DF_IO14_GPIO_29		MFP_CFG(DF_IO14, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define DF_IO13_GPIO_30		MFP_CFG(DF_IO13, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define DF_IO12_GPIO_31		MFP_CFG(DF_IO12, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define DF_IO11_GPIO_32		MFP_CFG(DF_IO11, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define DF_IO10_GPIO_33		MFP_CFG(DF_IO10, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define DF_IO9_GPIO_34		MFP_CFG(DF_IO9, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define DF_IO8_GPIO_35		MFP_CFG(DF_IO8, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define DF_IO7_GPIO_36		MFP_CFG(DF_IO7, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define DF_IO6_GPIO_37		MFP_CFG(DF_IO6, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define DF_IO5_GPIO_38		MFP_CFG(DF_IO5, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define DF_IO4_GPIO_39		MFP_CFG(DF_IO4, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define DF_IO3_GPIO_40		MFP_CFG(DF_IO3, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define DF_IO2_GPIO_41		MFP_CFG(DF_IO2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define DF_IO1_GPIO_42		MFP_CFG(DF_IO1, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define DF_IO0_GPIO_43		MFP_CFG(DF_IO0, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define DF_nCS0_GPIO_44		MFP_CFG(DF_nCS0, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define DF_nCS1_GPIO_45		MFP_CFG(DF_nCS1, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define DF_nWE_GPIO_46		MFP_CFG(DF_nWE, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define DF_nRE_nOE_GPIO_47	MFP_CFG(DF_nRE_nOE, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define DF_CLE_nOE_GPIO_48	MFP_CFG(DF_CLE_nOE, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define DF_nADV1_ALE_GPIO_49	MFP_CFG(DF_nADV1_ALE, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define DF_nADV2_ALE_GPIO_50	MFP_CFG(DF_nADV2_ALE, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define DF_INT_RnB_GPIO_51	MFP_CFG(DF_INT_RnB, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define DF_SCLK_E_GPIO_52	MFP_CFG(DF_SCLK_E, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define DF_ADDR0_GPIO_53	MFP_CFG(DF_ADDR0, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define DF_ADDR1_GPIO_54	MFP_CFG(DF_ADDR1, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define DF_ADDR2_GPIO_55	MFP_CFG(DF_ADDR2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define DF_ADDR3_GPIO_56	MFP_CFG(DF_ADDR3, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define nXCVREN_GPIO_57		MFP_CFG(nXCVREN, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define nLUA_GPIO_58		MFP_CFG(nLUA, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define nLLA_GPIO_59		MFP_CFG(nLLA, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define nBE0_GPIO_60		MFP_CFG(nBE0, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define nBE1_GPIO_61		MFP_CFG(nBE1, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define RDY_GPIO_62		MFP_CFG(RDY, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define PMIC_INT_GPIO83		MFP_CFG_LPM(PMIC_INT, AF0, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) /* Chip Select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define DF_nCS0_nCS2		MFP_CFG_LPM(DF_nCS0, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define DF_nCS1_nCS3		MFP_CFG_LPM(DF_nCS1, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) /* AC97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define GPIO83_BAC97_SYSCLK	MFP_CFG(GPIO83, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define GPIO84_BAC97_SDATA_IN0	MFP_CFG(GPIO84, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define GPIO85_BAC97_BITCLK	MFP_CFG(GPIO85, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define GPIO86_BAC97_nRESET	MFP_CFG(GPIO86, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define GPIO87_BAC97_SYNC	MFP_CFG(GPIO87, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define GPIO88_BAC97_SDATA_OUT	MFP_CFG(GPIO88, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) /* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define GPIO39_CI2C_SCL		MFP_CFG_LPM(GPIO39, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define GPIO40_CI2C_SDA		MFP_CFG_LPM(GPIO40, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define GPIO51_CI2C_SCL		MFP_CFG_LPM(GPIO51, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define GPIO52_CI2C_SDA		MFP_CFG_LPM(GPIO52, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define GPIO63_CI2C_SCL		MFP_CFG_LPM(GPIO63, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #define GPIO64_CI2C_SDA		MFP_CFG_LPM(GPIO64, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define GPIO73_CI2C_SCL		MFP_CFG_LPM(GPIO73, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #define GPIO74_CI2C_SDA		MFP_CFG_LPM(GPIO74, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define GPIO77_CI2C_SCL		MFP_CFG_LPM(GPIO77, AF2, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define GPIO78_CI2C_SDA		MFP_CFG_LPM(GPIO78, AF2, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define GPIO89_CI2C_SCL		MFP_CFG_LPM(GPIO89, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define GPIO90_CI2C_SDA		MFP_CFG_LPM(GPIO90, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define GPIO95_CI2C_SCL		MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define GPIO96_CI2C_SDA		MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define GPIO97_CI2C_SCL		MFP_CFG_LPM(GPIO97, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define GPIO98_CI2C_SDA		MFP_CFG_LPM(GPIO98, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* QCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define GPIO63_CI_DD_9		MFP_CFG_LPM(GPIO63, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define GPIO64_CI_DD_8		MFP_CFG_LPM(GPIO64, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define GPIO65_CI_DD_7		MFP_CFG_LPM(GPIO65, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define GPIO66_CI_DD_6		MFP_CFG_LPM(GPIO66, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define GPIO67_CI_DD_5		MFP_CFG_LPM(GPIO67, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define GPIO68_CI_DD_4		MFP_CFG_LPM(GPIO68, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define GPIO69_CI_DD_3		MFP_CFG_LPM(GPIO69, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define GPIO70_CI_DD_2		MFP_CFG_LPM(GPIO70, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define GPIO71_CI_DD_1		MFP_CFG_LPM(GPIO71, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define GPIO72_CI_DD_0		MFP_CFG_LPM(GPIO72, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define GPIO73_CI_HSYNC		MFP_CFG_LPM(GPIO73, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define GPIO74_CI_VSYNC		MFP_CFG_LPM(GPIO74, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define GPIO75_CI_MCLK		MFP_CFG_LPM(GPIO75, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define GPIO76_CI_PCLK		MFP_CFG_LPM(GPIO76, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* KEYPAD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define GPIO4_KP_DKIN_4		MFP_CFG_LPM(GPIO4, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define GPIO5_KP_DKIN_5		MFP_CFG_LPM(GPIO5, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define GPIO6_KP_DKIN_6		MFP_CFG_LPM(GPIO6, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define GPIO7_KP_DKIN_7		MFP_CFG_LPM(GPIO7, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define GPIO8_KP_DKIN_4		MFP_CFG_LPM(GPIO8, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define GPIO9_KP_DKIN_5		MFP_CFG_LPM(GPIO9, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define GPIO10_KP_DKIN_6	MFP_CFG_LPM(GPIO10, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define GPIO11_KP_DKIN_7	MFP_CFG_LPM(GPIO11, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define GPIO12_KP_DKIN_0	MFP_CFG_LPM(GPIO12, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define GPIO13_KP_DKIN_1	MFP_CFG_LPM(GPIO13, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define GPIO14_KP_DKIN_2	MFP_CFG_LPM(GPIO14, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define GPIO15_KP_DKIN_3	MFP_CFG_LPM(GPIO15, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define GPIO41_KP_DKIN_0	MFP_CFG_LPM(GPIO41, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define GPIO42_KP_DKIN_1	MFP_CFG_LPM(GPIO42, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define GPIO43_KP_DKIN_2	MFP_CFG_LPM(GPIO43, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define GPIO44_KP_DKIN_3	MFP_CFG_LPM(GPIO44, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define GPIO41_KP_DKIN_4	MFP_CFG_LPM(GPIO41, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define GPIO42_KP_DKIN_5	MFP_CFG_LPM(GPIO42, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define GPIO0_KP_MKIN_0		MFP_CFG_LPM(GPIO0, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define GPIO2_KP_MKIN_1		MFP_CFG_LPM(GPIO2, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define GPIO4_KP_MKIN_2		MFP_CFG_LPM(GPIO4, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define GPIO6_KP_MKIN_3		MFP_CFG_LPM(GPIO6, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define GPIO8_KP_MKIN_4		MFP_CFG_LPM(GPIO8, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define GPIO10_KP_MKIN_5	MFP_CFG_LPM(GPIO10, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define GPIO12_KP_MKIN_6	MFP_CFG_LPM(GPIO12, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define GPIO14_KP_MKIN_7	MFP_CFG(GPIO14, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define GPIO35_KP_MKIN_5	MFP_CFG(GPIO35, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define GPIO1_KP_MKOUT_0	MFP_CFG_LPM(GPIO1, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define GPIO3_KP_MKOUT_1	MFP_CFG_LPM(GPIO3, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define GPIO5_KP_MKOUT_2	MFP_CFG_LPM(GPIO5, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define GPIO7_KP_MKOUT_3	MFP_CFG_LPM(GPIO7, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define GPIO9_KP_MKOUT_4	MFP_CFG_LPM(GPIO9, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define GPIO11_KP_MKOUT_5	MFP_CFG_LPM(GPIO11, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define GPIO13_KP_MKOUT_6	MFP_CFG_LPM(GPIO13, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define GPIO15_KP_MKOUT_7	MFP_CFG_LPM(GPIO15, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define GPIO36_KP_MKOUT_5	MFP_CFG_LPM(GPIO36, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define GPIO17_LCD_FCLK_RD	MFP_CFG(GPIO17, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define GPIO18_LCD_LCLK_A0	MFP_CFG(GPIO18, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define GPIO19_LCD_PCLK_WR	MFP_CFG(GPIO19, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define GPIO20_LCD_BIAS		MFP_CFG(GPIO20, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define GPIO21_LCD_CS		MFP_CFG(GPIO21, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define GPIO22_LCD_CS2		MFP_CFG(GPIO22, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define GPIO22_LCD_VSYNC	MFP_CFG(GPIO22, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define GPIO23_LCD_DD0		MFP_CFG(GPIO23, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define GPIO24_LCD_DD1		MFP_CFG(GPIO24, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define GPIO25_LCD_DD2		MFP_CFG(GPIO25, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define GPIO26_LCD_DD3		MFP_CFG(GPIO26, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define GPIO27_LCD_DD4		MFP_CFG(GPIO27, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define GPIO28_LCD_DD5		MFP_CFG(GPIO28, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define GPIO29_LCD_DD6		MFP_CFG(GPIO29, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define GPIO30_LCD_DD7		MFP_CFG(GPIO30, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define GPIO31_LCD_DD8		MFP_CFG(GPIO31, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define GPIO32_LCD_DD9		MFP_CFG(GPIO32, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define GPIO33_LCD_DD10		MFP_CFG(GPIO33, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define GPIO34_LCD_DD11		MFP_CFG(GPIO34, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define GPIO35_LCD_DD12		MFP_CFG(GPIO35, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define GPIO36_LCD_DD13		MFP_CFG(GPIO36, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define GPIO37_LCD_DD14		MFP_CFG(GPIO37, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define GPIO38_LCD_DD15		MFP_CFG(GPIO38, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define GPIO39_LCD_DD16		MFP_CFG(GPIO39, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define GPIO40_LCD_DD17		MFP_CFG(GPIO40, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define GPIO41_LCD_CS2		MFP_CFG(GPIO41, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define GPIO42_LCD_VSYNC2	MFP_CFG(GPIO42, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define GPIO44_LCD_DD7		MFP_CFG(GPIO44, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* Mini-LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define GPIO17_MLCD_FCLK	MFP_CFG(GPIO17, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define GPIO18_MLCD_LCLK	MFP_CFG(GPIO18, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define GPIO19_MLCD_PCLK	MFP_CFG(GPIO19, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define GPIO20_MLCD_BIAS	MFP_CFG(GPIO20, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define GPIO23_MLCD_DD0		MFP_CFG(GPIO23, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define GPIO24_MLCD_DD1		MFP_CFG(GPIO24, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define GPIO25_MLCD_DD2		MFP_CFG(GPIO25, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define GPIO26_MLCD_DD3		MFP_CFG(GPIO26, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define GPIO27_MLCD_DD4		MFP_CFG(GPIO27, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define GPIO28_MLCD_DD5		MFP_CFG(GPIO28, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define GPIO29_MLCD_DD6		MFP_CFG(GPIO29, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define GPIO30_MLCD_DD7		MFP_CFG(GPIO30, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define GPIO31_MLCD_DD8		MFP_CFG(GPIO31, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define GPIO32_MLCD_DD9		MFP_CFG(GPIO32, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define GPIO33_MLCD_DD10	MFP_CFG(GPIO33, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define GPIO34_MLCD_DD11	MFP_CFG(GPIO34, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define GPIO35_MLCD_DD12	MFP_CFG(GPIO35, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define GPIO36_MLCD_DD13	MFP_CFG(GPIO36, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define GPIO37_MLCD_DD14	MFP_CFG(GPIO37, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define GPIO38_MLCD_DD15	MFP_CFG(GPIO38, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define GPIO44_MLCD_DD7		MFP_CFG(GPIO44, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* MMC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define GPIO10_MMC1_DAT3	MFP_CFG(GPIO10, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define GPIO11_MMC1_DAT2	MFP_CFG(GPIO11, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define GPIO12_MMC1_DAT1	MFP_CFG(GPIO12, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define GPIO13_MMC1_DAT0	MFP_CFG(GPIO13, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define GPIO14_MMC1_CMD		MFP_CFG(GPIO14, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define GPIO15_MMC1_CLK		MFP_CFG(GPIO15, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define GPIO55_MMC1_CMD		MFP_CFG(GPIO55, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define GPIO56_MMC1_CLK		MFP_CFG(GPIO56, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define GPIO57_MMC1_DAT0	MFP_CFG(GPIO57, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define GPIO58_MMC1_DAT1	MFP_CFG(GPIO58, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define GPIO59_MMC1_DAT2	MFP_CFG(GPIO59, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define GPIO60_MMC1_DAT3	MFP_CFG(GPIO60, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define DF_ADDR0_MMC1_CLK	MFP_CFG(DF_ADDR0, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define DF_ADDR1_MMC1_CMD	MFP_CFG(DF_ADDR1, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define DF_ADDR2_MMC1_DAT0	MFP_CFG(DF_ADDR2, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define DF_ADDR3_MMC1_DAT1	MFP_CFG(DF_ADDR3, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define nXCVREN_MMC1_DAT2	MFP_CFG(nXCVREN, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* MMC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define GPIO31_MMC2_CMD		MFP_CFG(GPIO31, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define GPIO32_MMC2_CLK		MFP_CFG(GPIO32, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define GPIO33_MMC2_DAT0	MFP_CFG(GPIO33, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define GPIO34_MMC2_DAT1	MFP_CFG(GPIO34, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define GPIO35_MMC2_DAT2	MFP_CFG(GPIO35, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define GPIO36_MMC2_DAT3	MFP_CFG(GPIO36, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define GPIO101_MMC2_DAT3	MFP_CFG(GPIO101, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define GPIO102_MMC2_DAT2	MFP_CFG(GPIO102, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define GPIO103_MMC2_DAT1	MFP_CFG(GPIO103, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define GPIO104_MMC2_DAT0	MFP_CFG(GPIO104, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define GPIO105_MMC2_CMD	MFP_CFG(GPIO105, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define GPIO106_MMC2_CLK	MFP_CFG(GPIO106, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define DF_IO10_MMC2_DAT3	MFP_CFG(DF_IO10, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define DF_IO11_MMC2_DAT2	MFP_CFG(DF_IO11, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define DF_IO12_MMC2_DAT1	MFP_CFG(DF_IO12, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define DF_IO13_MMC2_DAT0	MFP_CFG(DF_IO13, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define DF_IO14_MMC2_CLK	MFP_CFG(DF_IO14, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define DF_IO15_MMC2_CMD	MFP_CFG(DF_IO15, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* BSSP1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define GPIO12_BSSP1_CLK	MFP_CFG(GPIO12, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define GPIO13_BSSP1_FRM	MFP_CFG(GPIO13, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define GPIO14_BSSP1_RXD	MFP_CFG(GPIO14, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define GPIO15_BSSP1_TXD	MFP_CFG(GPIO15, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define GPIO97_BSSP1_CLK	MFP_CFG(GPIO97, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define GPIO98_BSSP1_FRM	MFP_CFG(GPIO98, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* BSSP2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define GPIO84_BSSP2_SDATA_IN	MFP_CFG(GPIO84, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define GPIO85_BSSP2_BITCLK	MFP_CFG(GPIO85, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define GPIO86_BSSP2_SYSCLK	MFP_CFG(GPIO86, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define GPIO87_BSSP2_SYNC	MFP_CFG(GPIO87, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define GPIO88_BSSP2_DATA_OUT	MFP_CFG(GPIO88, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define GPIO86_BSSP2_SDATA_IN	MFP_CFG(GPIO86, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* BSSP3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define GPIO79_BSSP3_CLK	MFP_CFG(GPIO79, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define GPIO80_BSSP3_FRM	MFP_CFG(GPIO80, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define GPIO81_BSSP3_TXD	MFP_CFG(GPIO81, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define GPIO82_BSSP3_RXD	MFP_CFG(GPIO82, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define GPIO83_BSSP3_SYSCLK	MFP_CFG(GPIO83, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /* BSSP4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define GPIO43_BSSP4_CLK	MFP_CFG(GPIO43, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define GPIO44_BSSP4_FRM	MFP_CFG(GPIO44, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define GPIO45_BSSP4_TXD	MFP_CFG(GPIO45, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define GPIO46_BSSP4_RXD	MFP_CFG(GPIO46, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define GPIO51_BSSP4_CLK	MFP_CFG(GPIO51, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define GPIO52_BSSP4_FRM	MFP_CFG(GPIO52, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define GPIO53_BSSP4_TXD	MFP_CFG(GPIO53, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define GPIO54_BSSP4_RXD	MFP_CFG(GPIO54, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* GSSP1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define GPIO79_GSSP1_CLK	MFP_CFG(GPIO79, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define GPIO80_GSSP1_FRM	MFP_CFG(GPIO80, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define GPIO81_GSSP1_TXD	MFP_CFG(GPIO81, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define GPIO82_GSSP1_RXD	MFP_CFG(GPIO82, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define GPIO83_GSSP1_SYSCLK	MFP_CFG(GPIO83, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define GPIO93_GSSP1_CLK	MFP_CFG(GPIO93, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define GPIO94_GSSP1_FRM	MFP_CFG(GPIO94, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define GPIO95_GSSP1_TXD	MFP_CFG(GPIO95, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define GPIO96_GSSP1_RXD	MFP_CFG(GPIO96, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* GSSP2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #define GPIO47_GSSP2_CLK	MFP_CFG(GPIO47, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define GPIO48_GSSP2_FRM	MFP_CFG(GPIO48, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define GPIO49_GSSP2_RXD	MFP_CFG(GPIO49, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define GPIO50_GSSP2_TXD	MFP_CFG(GPIO50, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #define GPIO69_GSSP2_CLK	MFP_CFG(GPIO69, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define GPIO70_GSSP2_FRM	MFP_CFG(GPIO70, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define GPIO71_GSSP2_RXD	MFP_CFG(GPIO71, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define GPIO72_GSSP2_TXD	MFP_CFG(GPIO72, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #define GPIO84_GSSP2_RXD	MFP_CFG(GPIO84, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define GPIO85_GSSP2_CLK	MFP_CFG(GPIO85, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define GPIO86_GSSP2_SYSCLK	MFP_CFG(GPIO86, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define GPIO87_GSSP2_FRM	MFP_CFG(GPIO87, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define GPIO88_GSSP2_TXD	MFP_CFG(GPIO88, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define GPIO86_GSSP2_RXD	MFP_CFG(GPIO86, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define GPIO103_GSSP2_CLK	MFP_CFG(GPIO103, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #define GPIO104_GSSP2_FRM	MFP_CFG(GPIO104, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define GPIO105_GSSP2_RXD	MFP_CFG(GPIO105, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #define GPIO106_GSSP2_TXD	MFP_CFG(GPIO106, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* UART1 - FFUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define GPIO47_UART1_DSR_N	MFP_CFG(GPIO47, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define GPIO48_UART1_DTR_N	MFP_CFG(GPIO48, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define GPIO49_UART1_RI		MFP_CFG(GPIO49, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define GPIO50_UART1_DCD	MFP_CFG(GPIO50, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define GPIO51_UART1_CTS	MFP_CFG(GPIO51, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define GPIO52_UART1_RTS	MFP_CFG(GPIO52, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define GPIO53_UART1_RXD	MFP_CFG(GPIO53, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define GPIO54_UART1_TXD	MFP_CFG(GPIO54, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define GPIO63_UART1_TXD	MFP_CFG(GPIO63, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define GPIO64_UART1_RXD	MFP_CFG(GPIO64, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #define GPIO65_UART1_DSR	MFP_CFG(GPIO65, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #define GPIO66_UART1_DTR	MFP_CFG(GPIO66, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define GPIO67_UART1_RI		MFP_CFG(GPIO67, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define GPIO68_UART1_DCD	MFP_CFG(GPIO68, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define GPIO69_UART1_CTS	MFP_CFG(GPIO69, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define GPIO70_UART1_RTS	MFP_CFG(GPIO70, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #define GPIO53_UART1_TXD	MFP_CFG(GPIO53, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #define GPIO54_UART1_RXD	MFP_CFG(GPIO54, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* UART2 - BTUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define GPIO91_UART2_RXD	MFP_CFG(GPIO91, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define GPIO92_UART2_TXD	MFP_CFG(GPIO92, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #define GPIO93_UART2_CTS	MFP_CFG(GPIO93, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) #define GPIO94_UART2_RTS	MFP_CFG(GPIO94, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /* UART3 - STUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define GPIO43_UART3_RTS	MFP_CFG(GPIO43, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define GPIO44_UART3_CTS	MFP_CFG(GPIO44, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define GPIO45_UART3_RXD	MFP_CFG(GPIO45, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define GPIO46_UART3_TXD	MFP_CFG(GPIO46, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) #define GPIO75_UART3_RTS	MFP_CFG(GPIO75, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #define GPIO76_UART3_CTS	MFP_CFG(GPIO76, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #define GPIO77_UART3_TXD	MFP_CFG(GPIO77, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #define GPIO78_UART3_RXD	MFP_CFG(GPIO78, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /* DFI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #define DF_IO0_DF_IO0		MFP_CFG(DF_IO0, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) #define DF_IO1_DF_IO1		MFP_CFG(DF_IO1, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #define DF_IO2_DF_IO2		MFP_CFG(DF_IO2, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #define DF_IO3_DF_IO3		MFP_CFG(DF_IO3, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define DF_IO4_DF_IO4		MFP_CFG(DF_IO4, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #define DF_IO5_DF_IO5		MFP_CFG(DF_IO5, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define DF_IO6_DF_IO6		MFP_CFG(DF_IO6, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #define DF_IO7_DF_IO7		MFP_CFG(DF_IO7, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #define DF_IO8_DF_IO8		MFP_CFG(DF_IO8, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) #define DF_IO9_DF_IO9		MFP_CFG(DF_IO9, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #define DF_IO10_DF_IO10		MFP_CFG(DF_IO10, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define DF_IO11_DF_IO11		MFP_CFG(DF_IO11, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define DF_IO12_DF_IO12		MFP_CFG(DF_IO12, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define DF_IO13_DF_IO13		MFP_CFG(DF_IO13, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #define DF_IO14_DF_IO14		MFP_CFG(DF_IO14, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #define DF_IO15_DF_IO15		MFP_CFG(DF_IO15, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #define DF_nADV1_ALE_DF_nADV1	MFP_CFG(DF_nADV1_ALE, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #define DF_nADV2_ALE_DF_nADV2	MFP_CFG(DF_nADV2_ALE, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) #define DF_nCS0_DF_nCS0		MFP_CFG(DF_nCS0, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #define DF_nCS1_DF_nCS1		MFP_CFG(DF_nCS1, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define DF_nRE_nOE_DF_nOE	MFP_CFG(DF_nRE_nOE, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) #define DF_nWE_DF_nWE		MFP_CFG(DF_nWE, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* DFI - NAND */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #define DF_CLE_nOE_ND_CLE	MFP_CFG_LPM(DF_CLE_nOE, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define DF_INT_RnB_ND_INT_RnB	MFP_CFG_LPM(DF_INT_RnB, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define DF_IO0_ND_IO0		MFP_CFG_LPM(DF_IO0, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #define DF_IO1_ND_IO1		MFP_CFG_LPM(DF_IO1, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define DF_IO2_ND_IO2		MFP_CFG_LPM(DF_IO2, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #define DF_IO3_ND_IO3		MFP_CFG_LPM(DF_IO3, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) #define DF_IO4_ND_IO4		MFP_CFG_LPM(DF_IO4, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #define DF_IO5_ND_IO5		MFP_CFG_LPM(DF_IO5, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) #define DF_IO6_ND_IO6		MFP_CFG_LPM(DF_IO6, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #define DF_IO7_ND_IO7		MFP_CFG_LPM(DF_IO7, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) #define DF_IO8_ND_IO8		MFP_CFG_LPM(DF_IO8, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) #define DF_IO9_ND_IO9		MFP_CFG_LPM(DF_IO9, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) #define DF_IO10_ND_IO10		MFP_CFG_LPM(DF_IO10, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) #define DF_IO11_ND_IO11		MFP_CFG_LPM(DF_IO11, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) #define DF_IO12_ND_IO12		MFP_CFG_LPM(DF_IO12, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) #define DF_IO13_ND_IO13		MFP_CFG_LPM(DF_IO13, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) #define DF_IO14_ND_IO14		MFP_CFG_LPM(DF_IO14, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) #define DF_IO15_ND_IO15		MFP_CFG_LPM(DF_IO15, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #define DF_nADV1_ALE_ND_ALE	MFP_CFG_LPM(DF_nADV1_ALE, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #define DF_nADV2_ALE_ND_ALE	MFP_CFG_LPM(DF_nADV2_ALE, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #define	DF_nADV2_ALE_nCS3	MFP_CFG_LPM(DF_nADV2_ALE, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #define DF_nCS0_ND_nCS0		MFP_CFG_LPM(DF_nCS0, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #define DF_nCS1_ND_nCS1		MFP_CFG_LPM(DF_nCS1, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) #define DF_nRE_nOE_ND_nRE	MFP_CFG_LPM(DF_nRE_nOE, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define DF_nWE_ND_nWE		MFP_CFG_LPM(DF_nWE, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /* PWM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #define GPIO41_PWM0		MFP_CFG_LPM(GPIO41, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #define GPIO42_PWM1		MFP_CFG_LPM(GPIO42, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #define GPIO43_PWM3		MFP_CFG_LPM(GPIO43, AF1, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) #define GPIO20_PWM0		MFP_CFG_LPM(GPIO20, AF2, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #define GPIO21_PWM2		MFP_CFG_LPM(GPIO21, AF3, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #define GPIO22_PWM3		MFP_CFG_LPM(GPIO22, AF3, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #define GPIO32_PWM0		MFP_CFG_LPM(GPIO32, AF4, PULL_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /* CIR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #define GPIO46_CIR_OUT		MFP_CFG(GPIO46, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #define GPIO77_CIR_OUT		MFP_CFG(GPIO77, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /* USB P2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #define GPIO0_USB_P2_7		MFP_CFG(GPIO0, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) #define GPIO15_USB_P2_7		MFP_CFG(GPIO15, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #define GPIO16_USB_P2_7		MFP_CFG(GPIO16, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #define GPIO48_USB_P2_7		MFP_CFG(GPIO48, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #define GPIO49_USB_P2_7		MFP_CFG(GPIO49, AF6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #define DF_IO9_USB_P2_7		MFP_CFG(DF_IO9, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) #define GPIO48_USB_P2_8		MFP_CFG(GPIO48, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) #define GPIO50_USB_P2_7		MFP_CFG_X(GPIO50, AF2, DS02X, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) #define GPIO51_USB_P2_5		MFP_CFG(GPIO51, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #define GPIO47_USB_P2_4		MFP_CFG(GPIO47, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #define GPIO53_USB_P2_3		MFP_CFG(GPIO53, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) #define GPIO54_USB_P2_6		MFP_CFG(GPIO54, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define GPIO49_USB_P2_2		MFP_CFG(GPIO49, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define GPIO52_USB_P2_1		MFP_CFG(GPIO52, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define GPIO63_USB_P2_8		MFP_CFG(GPIO63, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) #define GPIO64_USB_P2_7		MFP_CFG(GPIO64, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #define GPIO65_USB_P2_6		MFP_CFG(GPIO65, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define GPIO66_USG_P2_5		MFP_CFG(GPIO66, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #define GPIO67_USB_P2_4		MFP_CFG(GPIO67, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #define GPIO68_USB_P2_3		MFP_CFG(GPIO68, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) #define GPIO69_USB_P2_2		MFP_CFG(GPIO69, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #define GPIO70_USB_P2_1		MFP_CFG(GPIO70, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* ULPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) #define GPIO31_USB_ULPI_D0	MFP_CFG(GPIO31, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) #define GPIO30_USB_ULPI_D1	MFP_CFG(GPIO30, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) #define GPIO33_USB_ULPI_D2	MFP_CFG(GPIO33, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) #define GPIO34_USB_ULPI_D3	MFP_CFG(GPIO34, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) #define GPIO35_USB_ULPI_D4	MFP_CFG(GPIO35, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) #define GPIO36_USB_ULPI_D5	MFP_CFG(GPIO36, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) #define GPIO41_USB_ULPI_D6	MFP_CFG(GPIO41, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #define GPIO42_USB_ULPI_D7	MFP_CFG(GPIO42, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #define GPIO37_USB_ULPI_DIR	MFP_CFG(GPIO37, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) #define GPIO38_USB_ULPI_CLK	MFP_CFG(GPIO38, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) #define GPIO39_USB_ULPI_STP	MFP_CFG(GPIO39, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #define GPIO40_USB_ULPI_NXT	MFP_CFG(GPIO40, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) #define GPIO3_CLK26MOUTDMD	MFP_CFG(GPIO3, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) #define GPIO40_CLK26MOUTDMD	MFP_CFG(GPIO40, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) #define GPIO94_CLK26MOUTDMD	MFP_CFG(GPIO94, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) #define GPIO104_CLK26MOUTDMD	MFP_CFG(GPIO104, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) #define DF_ADDR1_CLK26MOUTDMD	MFP_CFG(DF_ADDR2, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #define DF_ADDR3_CLK26MOUTDMD	MFP_CFG(DF_ADDR3, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #define GPIO14_CLK26MOUT	MFP_CFG(GPIO14, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #define GPIO38_CLK26MOUT	MFP_CFG(GPIO38, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #define GPIO92_CLK26MOUT	MFP_CFG(GPIO92, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #define GPIO105_CLK26MOUT	MFP_CFG(GPIO105, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) #define GPIO2_CLK13MOUTDMD	MFP_CFG(GPIO2, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) #define GPIO39_CLK13MOUTDMD	MFP_CFG(GPIO39, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) #define GPIO50_CLK13MOUTDMD	MFP_CFG(GPIO50, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) #define GPIO93_CLK13MOUTDMD	MFP_CFG(GPIO93, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #define GPIO103_CLK13MOUTDMD	MFP_CFG(GPIO103, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) #define DF_ADDR2_CLK13MOUTDMD	MFP_CFG(DF_ADDR2, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* 1 wire */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #define GPIO95_OW_DQ_IN		MFP_CFG(GPIO95, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #endif /* __ASM_ARCH_MFP_PXA9xx_H */