Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * linux/arch/arm/mach-pxa/mfp.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * PXA3xx Multi-Function Pin Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2007 Marvell Internation Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * 2007-08-21: eric miao <eric.miao@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *             initial version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/syscore_ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "mfp-pxa3xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <mach/pxa3xx-regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * Configure the MFPs appropriately for suspend/resume.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * FIXME: this should probably depend on which system state we're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  * entering - for instance, we might not want to place MFP pins in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  * a pull-down mode if they're an active low chip select, and we're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * just entering standby.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int pxa3xx_mfp_suspend(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	mfp_config_lpm();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static void pxa3xx_mfp_resume(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	mfp_config_run();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	/* clear RDH bit when MFP settings are restored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	 * NOTE: the last 3 bits DxS are write-1-to-clear so carefully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	 * preserve them here in case they will be referenced later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define pxa3xx_mfp_suspend	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define pxa3xx_mfp_resume	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct syscore_ops pxa3xx_mfp_syscore_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	.suspend	= pxa3xx_mfp_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	.resume		= pxa3xx_mfp_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };