^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm/mach-pxa/include/mach/mfp-pxa320.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * PXA320 specific MFP configuration definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2007 Marvell International Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * 2007-08-21: eric miao <eric.miao@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * initial version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef __ASM_ARCH_MFP_PXA320_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define __ASM_ARCH_MFP_PXA320_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "mfp-pxa3xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define GPIO7_2_GPIO MFP_CFG(GPIO7_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define GPIO8_2_GPIO MFP_CFG(GPIO8_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define GPIO9_2_GPIO MFP_CFG(GPIO9_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define GPIO10_2_GPIO MFP_CFG(GPIO10_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define GPIO11_2_GPIO MFP_CFG(GPIO11_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define GPIO12_2_GPIO MFP_CFG(GPIO12_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define GPIO13_2_GPIO MFP_CFG(GPIO13_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define GPIO14_2_GPIO MFP_CFG(GPIO14_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define GPIO15_2_GPIO MFP_CFG(GPIO15_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define GPIO16_2_GPIO MFP_CFG(GPIO16_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define GPIO17_2_GPIO MFP_CFG(GPIO17_2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Chip Select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define GPIO3_nCS2 MFP_CFG(GPIO3, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define GPIO4_nCS3 MFP_CFG(GPIO4, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* AC97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define GPIO34_AC97_SYSCLK MFP_CFG(GPIO34, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define GPIO39_AC97_BITCLK MFP_CFG(GPIO39, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define GPIO40_AC97_nACRESET MFP_CFG(GPIO40, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define GPIO35_AC97_SDATA_IN_0 MFP_CFG(GPIO35, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define GPIO36_AC97_SDATA_IN_1 MFP_CFG(GPIO36, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define GPIO32_AC97_SDATA_IN_2 MFP_CFG(GPIO32, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define GPIO33_AC97_SDATA_IN_3 MFP_CFG(GPIO33, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define GPIO11_AC97_SDATA_IN_2 MFP_CFG(GPIO11, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define GPIO12_AC97_SDATA_IN_3 MFP_CFG(GPIO12, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define GPIO37_AC97_SDATA_OUT MFP_CFG(GPIO37, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define GPIO38_AC97_SYNC MFP_CFG(GPIO38, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define GPIO32_I2C_SCL MFP_CFG_LPM(GPIO32, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define GPIO33_I2C_SDA MFP_CFG_LPM(GPIO33, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* QCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define GPIO49_CI_DD_0 MFP_CFG_DRV(GPIO49, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define GPIO50_CI_DD_1 MFP_CFG_DRV(GPIO50, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define GPIO51_CI_DD_2 MFP_CFG_DRV(GPIO51, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define GPIO52_CI_DD_3 MFP_CFG_DRV(GPIO52, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define GPIO53_CI_DD_4 MFP_CFG_DRV(GPIO53, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define GPIO54_CI_DD_5 MFP_CFG_DRV(GPIO54, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define GPIO55_CI_DD_6 MFP_CFG_DRV(GPIO55, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define GPIO56_CI_DD_7 MFP_CFG_DRV(GPIO56, AF0, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define GPIO57_CI_DD_8 MFP_CFG_DRV(GPIO57, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define GPIO58_CI_DD_9 MFP_CFG_DRV(GPIO58, AF1, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define GPIO59_CI_MCLK MFP_CFG_DRV(GPIO59, AF0, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define GPIO60_CI_PCLK MFP_CFG_DRV(GPIO60, AF0, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define GPIO61_CI_HSYNC MFP_CFG_DRV(GPIO61, AF0, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define GPIO62_CI_VSYNC MFP_CFG_DRV(GPIO62, AF0, DS04X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define GPIO31_CIR_OUT MFP_CFG(GPIO31, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define GPIO0_2_CLK_EXT MFP_CFG(GPIO0_2, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define GPIO0_DRQ MFP_CFG(GPIO0, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define GPIO11_EXT_SYNC0 MFP_CFG(GPIO11, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define GPIO12_EXT_SYNC1 MFP_CFG(GPIO12, AF6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define GPIO0_2_HZ_CLK MFP_CFG(GPIO0_2, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define GPIO14_HZ_CLK MFP_CFG(GPIO14, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define GPIO30_ICP_RXD MFP_CFG(GPIO30, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define GPIO31_ICP_TXD MFP_CFG(GPIO31, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define GPIO83_KP_DKIN_0 MFP_CFG_LPM(GPIO83, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define GPIO84_KP_DKIN_1 MFP_CFG_LPM(GPIO84, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define GPIO85_KP_DKIN_2 MFP_CFG_LPM(GPIO85, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define GPIO86_KP_DKIN_3 MFP_CFG_LPM(GPIO86, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define GPIO105_KP_DKIN_0 MFP_CFG_LPM(GPIO105, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define GPIO106_KP_DKIN_1 MFP_CFG_LPM(GPIO106, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define GPIO107_KP_DKIN_2 MFP_CFG_LPM(GPIO107, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define GPIO108_KP_DKIN_3 MFP_CFG_LPM(GPIO108, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define GPIO109_KP_DKIN_4 MFP_CFG_LPM(GPIO109, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define GPIO110_KP_DKIN_5 MFP_CFG_LPM(GPIO110, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define GPIO111_KP_DKIN_6 MFP_CFG_LPM(GPIO111, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define GPIO112_KP_DKIN_7 MFP_CFG_LPM(GPIO112, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define GPIO113_KP_DKIN_0 MFP_CFG_LPM(GPIO113, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define GPIO114_KP_DKIN_1 MFP_CFG_LPM(GPIO114, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define GPIO115_KP_DKIN_2 MFP_CFG_LPM(GPIO115, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define GPIO116_KP_DKIN_3 MFP_CFG_LPM(GPIO116, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define GPIO117_KP_DKIN_4 MFP_CFG_LPM(GPIO117, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define GPIO118_KP_DKIN_5 MFP_CFG_LPM(GPIO118, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define GPIO119_KP_DKIN_6 MFP_CFG_LPM(GPIO119, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define GPIO120_KP_DKIN_7 MFP_CFG_LPM(GPIO120, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define GPIO127_KP_DKIN_0 MFP_CFG_LPM(GPIO127, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define GPIO126_KP_DKIN_1 MFP_CFG_LPM(GPIO126, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define GPIO2_2_KP_DKIN_0 MFP_CFG_LPM(GPIO2_2, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define GPIO3_2_KP_DKIN_1 MFP_CFG_LPM(GPIO3_2, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define GPIO125_KP_DKIN_2 MFP_CFG_LPM(GPIO125, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define GPIO124_KP_DKIN_3 MFP_CFG_LPM(GPIO124, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define GPIO123_KP_DKIN_4 MFP_CFG_LPM(GPIO123, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define GPIO122_KP_DKIN_5 MFP_CFG_LPM(GPIO122, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define GPIO121_KP_DKIN_6 MFP_CFG_LPM(GPIO121, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define GPIO4_2_KP_DKIN_7 MFP_CFG_LPM(GPIO4_2, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define GPIO113_KP_MKIN_0 MFP_CFG_LPM(GPIO113, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define GPIO114_KP_MKIN_1 MFP_CFG_LPM(GPIO114, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define GPIO115_KP_MKIN_2 MFP_CFG_LPM(GPIO115, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define GPIO116_KP_MKIN_3 MFP_CFG_LPM(GPIO116, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define GPIO117_KP_MKIN_4 MFP_CFG_LPM(GPIO117, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define GPIO118_KP_MKIN_5 MFP_CFG_LPM(GPIO118, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define GPIO119_KP_MKIN_6 MFP_CFG_LPM(GPIO119, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define GPIO120_KP_MKIN_7 MFP_CFG_LPM(GPIO120, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define GPIO83_KP_MKOUT_0 MFP_CFG_LPM(GPIO83, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define GPIO84_KP_MKOUT_1 MFP_CFG_LPM(GPIO84, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define GPIO85_KP_MKOUT_2 MFP_CFG_LPM(GPIO85, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define GPIO86_KP_MKOUT_3 MFP_CFG_LPM(GPIO86, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define GPIO13_KP_MKOUT_4 MFP_CFG_LPM(GPIO13, AF3, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define GPIO14_KP_MKOUT_5 MFP_CFG_LPM(GPIO14, AF3, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define GPIO121_KP_MKOUT_0 MFP_CFG_LPM(GPIO121, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define GPIO122_KP_MKOUT_1 MFP_CFG_LPM(GPIO122, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define GPIO123_KP_MKOUT_2 MFP_CFG_LPM(GPIO123, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define GPIO124_KP_MKOUT_3 MFP_CFG_LPM(GPIO124, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define GPIO125_KP_MKOUT_4 MFP_CFG_LPM(GPIO125, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define GPIO126_KP_MKOUT_5 MFP_CFG_LPM(GPIO126, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define GPIO127_KP_MKOUT_6 MFP_CFG_LPM(GPIO127, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define GPIO5_2_KP_MKOUT_7 MFP_CFG_LPM(GPIO5_2, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define GPIO6_2_LCD_LDD_0 MFP_CFG_DRV(GPIO6_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define GPIO7_2_LCD_LDD_1 MFP_CFG_DRV(GPIO7_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define GPIO8_2_LCD_LDD_2 MFP_CFG_DRV(GPIO8_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define GPIO9_2_LCD_LDD_3 MFP_CFG_DRV(GPIO9_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define GPIO10_2_LCD_LDD_4 MFP_CFG_DRV(GPIO10_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define GPIO11_2_LCD_LDD_5 MFP_CFG_DRV(GPIO11_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define GPIO12_2_LCD_LDD_6 MFP_CFG_DRV(GPIO12_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define GPIO13_2_LCD_LDD_7 MFP_CFG_DRV(GPIO13_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define GPIO63_LCD_LDD_8 MFP_CFG_DRV(GPIO63, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define GPIO64_LCD_LDD_9 MFP_CFG_DRV(GPIO64, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define GPIO65_LCD_LDD_10 MFP_CFG_DRV(GPIO65, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define GPIO66_LCD_LDD_11 MFP_CFG_DRV(GPIO66, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define GPIO67_LCD_LDD_12 MFP_CFG_DRV(GPIO67, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define GPIO68_LCD_LDD_13 MFP_CFG_DRV(GPIO68, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define GPIO69_LCD_LDD_14 MFP_CFG_DRV(GPIO69, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define GPIO70_LCD_LDD_15 MFP_CFG_DRV(GPIO70, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define GPIO71_LCD_LDD_16 MFP_CFG_DRV(GPIO71, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define GPIO72_LCD_LDD_17 MFP_CFG_DRV(GPIO72, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define GPIO73_LCD_CS_N MFP_CFG_DRV(GPIO73, AF2, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define GPIO74_LCD_VSYNC MFP_CFG_DRV(GPIO74, AF2, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define GPIO14_2_LCD_FCLK MFP_CFG_DRV(GPIO14_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define GPIO15_2_LCD_LCLK MFP_CFG_DRV(GPIO15_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define GPIO16_2_LCD_PCLK MFP_CFG_DRV(GPIO16_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define GPIO17_2_LCD_BIAS MFP_CFG_DRV(GPIO17_2, AF1, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define GPIO64_LCD_VSYNC MFP_CFG_DRV(GPIO64, AF2, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define GPIO63_LCD_CS_N MFP_CFG_DRV(GPIO63, AF2, DS01X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define GPIO6_2_MLCD_DD_0 MFP_CFG_DRV(GPIO6_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define GPIO7_2_MLCD_DD_1 MFP_CFG_DRV(GPIO7_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define GPIO8_2_MLCD_DD_2 MFP_CFG_DRV(GPIO8_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define GPIO9_2_MLCD_DD_3 MFP_CFG_DRV(GPIO9_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define GPIO10_2_MLCD_DD_4 MFP_CFG_DRV(GPIO10_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define GPIO11_2_MLCD_DD_5 MFP_CFG_DRV(GPIO11_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define GPIO12_2_MLCD_DD_6 MFP_CFG_DRV(GPIO12_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define GPIO13_2_MLCD_DD_7 MFP_CFG_DRV(GPIO13_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define GPIO63_MLCD_DD_8 MFP_CFG_DRV(GPIO63, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define GPIO64_MLCD_DD_9 MFP_CFG_DRV(GPIO64, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define GPIO65_MLCD_DD_10 MFP_CFG_DRV(GPIO65, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define GPIO66_MLCD_DD_11 MFP_CFG_DRV(GPIO66, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define GPIO67_MLCD_DD_12 MFP_CFG_DRV(GPIO67, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define GPIO68_MLCD_DD_13 MFP_CFG_DRV(GPIO68, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define GPIO69_MLCD_DD_14 MFP_CFG_DRV(GPIO69, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define GPIO70_MLCD_DD_15 MFP_CFG_DRV(GPIO70, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define GPIO71_MLCD_DD_16 MFP_CFG_DRV(GPIO71, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define GPIO72_MLCD_DD_17 MFP_CFG_DRV(GPIO72, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define GPIO73_MLCD_CS MFP_CFG_DRV(GPIO73, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define GPIO74_MLCD_VSYNC MFP_CFG_DRV(GPIO74, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define GPIO14_2_MLCD_FCLK MFP_CFG_DRV(GPIO14_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define GPIO15_2_MLCD_LCLK MFP_CFG_DRV(GPIO15_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define GPIO16_2_MLCD_PCLK MFP_CFG_DRV(GPIO16_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define GPIO17_2_MLCD_BIAS MFP_CFG_DRV(GPIO17_2, AF7, DS08X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* MMC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define GPIO9_MMC1_CMD MFP_CFG_LPM(GPIO9, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define GPIO22_MMC1_CLK MFP_CFG_LPM(GPIO22, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define GPIO23_MMC1_CMD MFP_CFG_LPM(GPIO23, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define GPIO30_MMC1_CLK MFP_CFG_LPM(GPIO30, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define GPIO31_MMC1_CMD MFP_CFG_LPM(GPIO31, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define GPIO5_MMC1_DAT0 MFP_CFG_LPM(GPIO5, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define GPIO6_MMC1_DAT1 MFP_CFG_LPM(GPIO6, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define GPIO7_MMC1_DAT2 MFP_CFG_LPM(GPIO7, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define GPIO8_MMC1_DAT3 MFP_CFG_LPM(GPIO8, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define GPIO18_MMC1_DAT0 MFP_CFG_LPM(GPIO18, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define GPIO19_MMC1_DAT1 MFP_CFG_LPM(GPIO19, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define GPIO20_MMC1_DAT2 MFP_CFG_LPM(GPIO20, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define GPIO21_MMC1_DAT3 MFP_CFG_LPM(GPIO21, AF4, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define GPIO28_MMC2_CLK MFP_CFG_LPM(GPIO28, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define GPIO29_MMC2_CMD MFP_CFG_LPM(GPIO29, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define GPIO30_MMC2_CLK MFP_CFG_LPM(GPIO30, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define GPIO31_MMC2_CMD MFP_CFG_LPM(GPIO31, AF3, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define GPIO79_MMC2_CLK MFP_CFG_LPM(GPIO79, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define GPIO80_MMC2_CMD MFP_CFG_LPM(GPIO80, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define GPIO5_MMC2_DAT0 MFP_CFG_LPM(GPIO5, AF2, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define GPIO6_MMC2_DAT1 MFP_CFG_LPM(GPIO6, AF2, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define GPIO7_MMC2_DAT2 MFP_CFG_LPM(GPIO7, AF2, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define GPIO8_MMC2_DAT3 MFP_CFG_LPM(GPIO8, AF2, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define GPIO24_MMC2_DAT0 MFP_CFG_LPM(GPIO24, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define GPIO75_MMC2_DAT0 MFP_CFG_LPM(GPIO75, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define GPIO25_MMC2_DAT1 MFP_CFG_LPM(GPIO25, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define GPIO76_MMC2_DAT1 MFP_CFG_LPM(GPIO76, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define GPIO26_MMC2_DAT2 MFP_CFG_LPM(GPIO26, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define GPIO77_MMC2_DAT2 MFP_CFG_LPM(GPIO77, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define GPIO27_MMC2_DAT3 MFP_CFG_LPM(GPIO27, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define GPIO78_MMC2_DAT3 MFP_CFG_LPM(GPIO78, AF4, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* 1-Wire */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define GPIO14_ONE_WIRE MFP_CFG_LPM(GPIO14, AF5, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define GPIO0_2_ONE_WIRE MFP_CFG_LPM(GPIO0_2, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* SSP1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define GPIO87_SSP1_EXTCLK MFP_CFG(GPIO87, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define GPIO88_SSP1_SYSCLK MFP_CFG(GPIO88, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define GPIO83_SSP1_SCLK MFP_CFG(GPIO83, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define GPIO84_SSP1_SFRM MFP_CFG(GPIO84, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define GPIO85_SSP1_RXD MFP_CFG(GPIO85, AF6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define GPIO85_SSP1_TXD MFP_CFG(GPIO85, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define GPIO86_SSP1_RXD MFP_CFG(GPIO86, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define GPIO86_SSP1_TXD MFP_CFG(GPIO86, AF6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* SSP2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define GPIO39_SSP2_EXTCLK MFP_CFG(GPIO39, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define GPIO40_SSP2_SYSCLK MFP_CFG(GPIO40, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define GPIO12_SSP2_SCLK MFP_CFG(GPIO12, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define GPIO35_SSP2_SCLK MFP_CFG(GPIO35, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define GPIO36_SSP2_SFRM MFP_CFG(GPIO36, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define GPIO37_SSP2_RXD MFP_CFG(GPIO37, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define GPIO37_SSP2_TXD MFP_CFG(GPIO37, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define GPIO69_SSP3_SCLK MFP_CFG_X(GPIO69, AF2, DS08X, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define GPIO70_SSP3_FRM MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define GPIO89_SSP3_SCLK MFP_CFG_X(GPIO89, AF1, DS08X, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define GPIO90_SSP3_FRM MFP_CFG_X(GPIO90, AF1, DS08X, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define GPIO72_SSP3_TXD MFP_CFG_X(GPIO72, AF5, DS08X, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define GPIO91_SSP3_RXD MFP_CFG_X(GPIO91, AF5, DS08X, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define GPIO91_SSP3_TXD MFP_CFG_X(GPIO91, AF1, DS08X, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define GPIO92_SSP3_RXD MFP_CFG_X(GPIO92, AF1, DS08X, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define GPIO92_SSP3_TXD MFP_CFG_X(GPIO92, AF5, DS08X, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define GPIO93_SSP4_SCLK MFP_CFG_LPM(GPIO93, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define GPIO94_SSP4_FRM MFP_CFG_LPM(GPIO94, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define GPIO94_SSP4_RXD MFP_CFG_LPM(GPIO94, AF5, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define GPIO95_SSP4_RXD MFP_CFG_LPM(GPIO95, AF5, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define GPIO95_SSP4_TXD MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define GPIO96_SSP4_RXD MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define GPIO96_SSP4_TXD MFP_CFG_LPM(GPIO96, AF5, PULL_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /* UART1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define GPIO41_UART1_RXD MFP_CFG_LPM(GPIO41, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define GPIO75_UART1_RXD MFP_CFG_LPM(GPIO75, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define GPIO76_UART1_RXD MFP_CFG_LPM(GPIO76, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define GPIO76_UART1_TXD MFP_CFG_LPM(GPIO76, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define GPIO98_UART1_TXD MFP_CFG_LPM(GPIO98, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define GPIO43_UART1_CTS MFP_CFG_LPM(GPIO43, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define GPIO77_UART1_CTS MFP_CFG_LPM(GPIO77, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define GPIO82_UART1_RTS MFP_CFG_LPM(GPIO82, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define GPIO82_UART1_CTS MFP_CFG_LPM(GPIO82, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define GPIO104_UART1_RTS MFP_CFG_LPM(GPIO104, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define GPIO45_UART1_DTR MFP_CFG_LPM(GPIO45, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define GPIO79_UART1_DSR MFP_CFG_LPM(GPIO79, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #define GPIO81_UART1_DTR MFP_CFG_LPM(GPIO81, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #define GPIO81_UART1_DSR MFP_CFG_LPM(GPIO81, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #define GPIO78_UART1_DCD MFP_CFG_LPM(GPIO78, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define GPIO80_UART1_RI MFP_CFG_LPM(GPIO80, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* UART2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define GPIO109_UART2_CTS MFP_CFG_LPM(GPIO109, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define GPIO109_UART2_RTS MFP_CFG_LPM(GPIO109, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define GPIO112_UART2_CTS MFP_CFG_LPM(GPIO112, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define GPIO112_UART2_RTS MFP_CFG_LPM(GPIO112, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define GPIO110_UART2_RXD MFP_CFG_LPM(GPIO110, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define GPIO110_UART2_TXD MFP_CFG_LPM(GPIO110, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #define GPIO111_UART2_RXD MFP_CFG_LPM(GPIO111, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define GPIO111_UART2_TXD MFP_CFG_LPM(GPIO111, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* UART3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define GPIO89_UART3_CTS MFP_CFG_LPM(GPIO89, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define GPIO89_UART3_RTS MFP_CFG_LPM(GPIO89, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define GPIO90_UART3_CTS MFP_CFG_LPM(GPIO90, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define GPIO90_UART3_RTS MFP_CFG_LPM(GPIO90, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define GPIO105_UART3_CTS MFP_CFG_LPM(GPIO105, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define GPIO105_UART3_RTS MFP_CFG_LPM(GPIO105, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define GPIO106_UART3_CTS MFP_CFG_LPM(GPIO106, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define GPIO106_UART3_RTS MFP_CFG_LPM(GPIO106, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define GPIO30_UART3_RXD MFP_CFG_LPM(GPIO30, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #define GPIO30_UART3_TXD MFP_CFG_LPM(GPIO30, AF6, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define GPIO31_UART3_RXD MFP_CFG_LPM(GPIO31, AF6, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define GPIO31_UART3_TXD MFP_CFG_LPM(GPIO31, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #define GPIO91_UART3_RXD MFP_CFG_LPM(GPIO91, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #define GPIO91_UART3_TXD MFP_CFG_LPM(GPIO91, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define GPIO92_UART3_RXD MFP_CFG_LPM(GPIO92, AF2, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define GPIO92_UART3_TXD MFP_CFG_LPM(GPIO92, AF4, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define GPIO107_UART3_RXD MFP_CFG_LPM(GPIO107, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define GPIO107_UART3_TXD MFP_CFG_LPM(GPIO107, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #define GPIO108_UART3_RXD MFP_CFG_LPM(GPIO108, AF1, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #define GPIO108_UART3_TXD MFP_CFG_LPM(GPIO108, AF3, FLOAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* USB 2.0 UTMI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define GPIO10_UTM_CLK MFP_CFG(GPIO10, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define GPIO36_U2D_RXERROR MFP_CFG(GPIO36, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #define GPIO60_U2D_RXERROR MFP_CFG(GPIO60, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) #define GPIO87_U2D_RXERROR MFP_CFG(GPIO87, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) #define GPIO34_UTM_RXVALID MFP_CFG(GPIO34, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #define GPIO58_UTM_RXVALID MFP_CFG(GPIO58, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define GPIO85_UTM_RXVALID MFP_CFG(GPIO85, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define GPIO35_UTM_RXACTIVE MFP_CFG(GPIO35, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define GPIO59_UTM_RXACTIVE MFP_CFG(GPIO59, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define GPIO86_UTM_RXACTIVE MFP_CFG(GPIO86, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) #define GPIO73_UTM_TXREADY MFP_CFG(GPIO73, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) #define GPIO68_UTM_LINESTATE_0 MFP_CFG(GPIO68, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #define GPIO90_UTM_LINESTATE_0 MFP_CFG(GPIO90, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #define GPIO102_UTM_LINESTATE_0 MFP_CFG(GPIO102, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #define GPIO107_UTM_LINESTATE_0 MFP_CFG(GPIO107, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #define GPIO69_UTM_LINESTATE_1 MFP_CFG(GPIO69, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define GPIO91_UTM_LINESTATE_1 MFP_CFG(GPIO91, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #define GPIO103_UTM_LINESTATE_1 MFP_CFG(GPIO103, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #define GPIO41_U2D_PHYDATA_0 MFP_CFG(GPIO41, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #define GPIO42_U2D_PHYDATA_1 MFP_CFG(GPIO42, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define GPIO43_U2D_PHYDATA_2 MFP_CFG(GPIO43, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #define GPIO44_U2D_PHYDATA_3 MFP_CFG(GPIO44, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define GPIO45_U2D_PHYDATA_4 MFP_CFG(GPIO45, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #define GPIO46_U2D_PHYDATA_5 MFP_CFG(GPIO46, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #define GPIO47_U2D_PHYDATA_6 MFP_CFG(GPIO47, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) #define GPIO48_U2D_PHYDATA_7 MFP_CFG(GPIO48, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define GPIO49_U2D_PHYDATA_0 MFP_CFG(GPIO49, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define GPIO50_U2D_PHYDATA_1 MFP_CFG(GPIO50, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define GPIO51_U2D_PHYDATA_2 MFP_CFG(GPIO51, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #define GPIO52_U2D_PHYDATA_3 MFP_CFG(GPIO52, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #define GPIO53_U2D_PHYDATA_4 MFP_CFG(GPIO53, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #define GPIO54_U2D_PHYDATA_5 MFP_CFG(GPIO54, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #define GPIO55_U2D_PHYDATA_6 MFP_CFG(GPIO55, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) #define GPIO56_U2D_PHYDATA_7 MFP_CFG(GPIO56, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define GPIO37_U2D_OPMODE0 MFP_CFG(GPIO37, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) #define GPIO61_U2D_OPMODE0 MFP_CFG(GPIO61, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #define GPIO88_U2D_OPMODE0 MFP_CFG(GPIO88, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #define GPIO38_U2D_OPMODE1 MFP_CFG(GPIO38, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define GPIO62_U2D_OPMODE1 MFP_CFG(GPIO62, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define GPIO104_U2D_OPMODE1 MFP_CFG(GPIO104, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #define GPIO108_U2D_OPMODE1 MFP_CFG(GPIO108, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #define GPIO74_U2D_RESET MFP_CFG(GPIO74, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) #define GPIO93_U2D_RESET MFP_CFG(GPIO93, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #define GPIO98_U2D_RESET MFP_CFG(GPIO98, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #define GPIO67_U2D_SUSPEND MFP_CFG(GPIO67, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) #define GPIO96_U2D_SUSPEND MFP_CFG(GPIO96, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) #define GPIO101_U2D_SUSPEND MFP_CFG(GPIO101, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) #define GPIO66_U2D_TERM_SEL MFP_CFG(GPIO66, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) #define GPIO95_U2D_TERM_SEL MFP_CFG(GPIO95, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) #define GPIO97_U2D_TERM_SEL MFP_CFG(GPIO97, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) #define GPIO100_U2D_TERM_SEL MFP_CFG(GPIO100, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #define GPIO39_U2D_TXVALID MFP_CFG(GPIO39, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #define GPIO70_U2D_TXVALID MFP_CFG(GPIO70, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #define GPIO83_U2D_TXVALID MFP_CFG(GPIO83, AF7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #define GPIO65_U2D_XCVR_SEL MFP_CFG(GPIO65, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) #define GPIO94_U2D_XCVR_SEL MFP_CFG(GPIO94, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define GPIO99_U2D_XCVR_SEL MFP_CFG(GPIO99, AF5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /* USB Host 1.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #define GPIO2_2_USBH_PEN MFP_CFG(GPIO2_2, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #define GPIO3_2_USBH_PWR MFP_CFG(GPIO3_2, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) /* USB P2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #define GPIO97_USB_P2_2 MFP_CFG(GPIO97, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #define GPIO97_USB_P2_6 MFP_CFG(GPIO97, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #define GPIO98_USB_P2_2 MFP_CFG(GPIO98, AF4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) #define GPIO98_USB_P2_6 MFP_CFG(GPIO98, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #define GPIO99_USB_P2_1 MFP_CFG(GPIO99, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #define GPIO100_USB_P2_4 MFP_CFG(GPIO100, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #define GPIO101_USB_P2_8 MFP_CFG(GPIO101, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) #define GPIO102_USB_P2_3 MFP_CFG(GPIO102, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #define GPIO103_USB_P2_5 MFP_CFG(GPIO103, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #define GPIO104_USB_P2_7 MFP_CFG(GPIO104, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /* USB P3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #define GPIO75_USB_P3_1 MFP_CFG(GPIO75, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #define GPIO76_USB_P3_2 MFP_CFG(GPIO76, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #define GPIO77_USB_P3_3 MFP_CFG(GPIO77, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) #define GPIO78_USB_P3_4 MFP_CFG(GPIO78, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) #define GPIO79_USB_P3_5 MFP_CFG(GPIO79, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) #define GPIO80_USB_P3_6 MFP_CFG(GPIO80, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #define GPIO13_CHOUT0 MFP_CFG(GPIO13, AF6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #define GPIO14_CHOUT1 MFP_CFG(GPIO14, AF6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define GPIO2_RDY MFP_CFG(GPIO2, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define GPIO5_NPIOR MFP_CFG(GPIO5, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #define GPIO6_NPIOW MFP_CFG(GPIO6, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define GPIO7_NPIOS16 MFP_CFG(GPIO7, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) #define GPIO8_NPWAIT MFP_CFG(GPIO8, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #define GPIO13_PWM2_OUT MFP_CFG(GPIO13, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) #define GPIO14_PWM3_OUT MFP_CFG(GPIO14, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) #endif /* __ASM_ARCH_MFP_PXA320_H */