Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef __ASM_ARCH_MFP_PXA25X_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define __ASM_ARCH_MFP_PXA25X_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include "mfp-pxa2xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) /* GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define GPIO2_GPIO		MFP_CFG_IN(GPIO2, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define GPIO3_GPIO		MFP_CFG_IN(GPIO3, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define GPIO4_GPIO		MFP_CFG_IN(GPIO4, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #define GPIO5_GPIO		MFP_CFG_IN(GPIO5, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define GPIO6_GPIO		MFP_CFG_IN(GPIO6, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define GPIO7_GPIO		MFP_CFG_IN(GPIO7, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define GPIO8_GPIO		MFP_CFG_IN(GPIO8, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define GPIO1_RST		MFP_CFG_IN(GPIO1, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) /* Crystal and Clock Signals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define GPIO10_RTCCLK		MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define GPIO70_RTCCLK		MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define GPIO7_48MHz		MFP_CFG_OUT(GPIO7,  AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define GPIO11_3_6MHz		MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define GPIO71_3_6MHz		MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define GPIO12_32KHz		MFP_CFG_OUT(GPIO12, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define GPIO72_32kHz		MFP_CFG_OUT(GPIO72, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /* SDRAM and Static Memory I/O Signals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define GPIO15_nCS_1		MFP_CFG_OUT(GPIO15, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define GPIO78_nCS_2		MFP_CFG_OUT(GPIO78, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define GPIO79_nCS_3		MFP_CFG_OUT(GPIO79, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define GPIO80_nCS_4		MFP_CFG_OUT(GPIO80, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define GPIO33_nCS_5		MFP_CFG_OUT(GPIO33, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /* Miscellaneous I/O and DMA Signals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define GPIO18_RDY		MFP_CFG_IN(GPIO18, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define GPIO20_DREQ_0		MFP_CFG_IN(GPIO20, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define GPIO19_DREQ_1		MFP_CFG_IN(GPIO19, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /* Alternate Bus Master Mode I/O Signals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define GPIO13_MBGNT		MFP_CFG_OUT(GPIO13, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define GPIO73_MBGNT		MFP_CFG_OUT(GPIO73, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define GPIO14_MBREQ		MFP_CFG_IN(GPIO14, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define GPIO66_MBREQ		MFP_CFG_IN(GPIO66, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) /* PC CARD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define GPIO52_nPCE_1		MFP_CFG_OUT(GPIO52, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define GPIO53_nPCE_2		MFP_CFG_OUT(GPIO53, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define GPIO55_nPREG		MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define GPIO50_nPIOR		MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define GPIO51_nPIOW		MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define GPIO49_nPWE		MFP_CFG_OUT(GPIO49, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define GPIO48_nPOE		MFP_CFG_OUT(GPIO48, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define GPIO57_nIOIS16		MFP_CFG_IN(GPIO57, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define GPIO56_nPWAIT		MFP_CFG_IN(GPIO56, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define GPIO54_nPSKTSEL		MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) /* FFUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define GPIO34_FFUART_RXD	MFP_CFG_IN(GPIO34, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define GPIO35_FFUART_CTS	MFP_CFG_IN(GPIO35, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define GPIO36_FFUART_DCD	MFP_CFG_IN(GPIO36, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define GPIO37_FFUART_DSR	MFP_CFG_IN(GPIO37, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define GPIO38_FFUART_RI	MFP_CFG_IN(GPIO38, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define GPIO39_FFUART_TXD	MFP_CFG_OUT(GPIO39, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define GPIO40_FFUART_DTR	MFP_CFG_OUT(GPIO40, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define GPIO41_FFUART_RTS	MFP_CFG_OUT(GPIO41, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) /* BTUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define GPIO42_BTUART_RXD	MFP_CFG_IN(GPIO42, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define GPIO43_BTUART_TXD	MFP_CFG_OUT(GPIO43, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define GPIO44_BTUART_CTS	MFP_CFG_IN(GPIO44, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define GPIO45_BTUART_RTS	MFP_CFG_OUT(GPIO45, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) /* STUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define GPIO46_STUART_RXD	MFP_CFG_IN(GPIO46, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define GPIO47_STUART_TXD	MFP_CFG_OUT(GPIO47, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) /* HWUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define GPIO42_HWUART_RXD	MFP_CFG_IN(GPIO42, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define GPIO43_HWUART_TXD	MFP_CFG_OUT(GPIO43, AF3, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define GPIO44_HWUART_CTS	MFP_CFG_IN(GPIO44, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define GPIO45_HWUART_RTS	MFP_CFG_OUT(GPIO45, AF3, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define GPIO48_HWUART_TXD	MFP_CFG_OUT(GPIO48, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define GPIO49_HWUART_RXD	MFP_CFG_IN(GPIO49, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define GPIO50_HWUART_CTS	MFP_CFG_IN(GPIO50, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define GPIO51_HWUART_RTS	MFP_CFG_OUT(GPIO51, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) /* FICP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define GPIO46_FICP_RXD		MFP_CFG_IN(GPIO46, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #define GPIO47_FICP_TXD		MFP_CFG_OUT(GPIO47, AF2, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) /* PWM 0/1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define GPIO16_PWM0_OUT		MFP_CFG_OUT(GPIO16, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define GPIO17_PWM1_OUT		MFP_CFG_OUT(GPIO17, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) /* AC97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define GPIO28_AC97_BITCLK	MFP_CFG_IN(GPIO28, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define GPIO29_AC97_SDATA_IN_0	MFP_CFG_IN(GPIO29, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define GPIO30_AC97_SDATA_OUT	MFP_CFG_OUT(GPIO30, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define GPIO31_AC97_SYNC	MFP_CFG_OUT(GPIO31, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define GPIO32_AC97_SDATA_IN_1	MFP_CFG_IN(GPIO32, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* I2S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define GPIO28_I2S_BITCLK_IN	MFP_CFG_IN(GPIO28, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define GPIO28_I2S_BITCLK_OUT	MFP_CFG_OUT(GPIO28, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define GPIO29_I2S_SDATA_IN	MFP_CFG_IN(GPIO29, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define GPIO30_I2S_SDATA_OUT	MFP_CFG_OUT(GPIO30, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define GPIO31_I2S_SYNC		MFP_CFG_OUT(GPIO31, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define GPIO32_I2S_SYSCLK	MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* SSP 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define GPIO23_SSP1_SCLK	MFP_CFG_OUT(GPIO23, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define GPIO24_SSP1_SFRM	MFP_CFG_OUT(GPIO24, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define GPIO25_SSP1_TXD		MFP_CFG_OUT(GPIO25, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define GPIO26_SSP1_RXD		MFP_CFG_IN(GPIO26, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define GPIO27_SSP1_EXTCLK	MFP_CFG_IN(GPIO27, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* SSP 2 - NSSP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define GPIO81_SSP2_CLK_OUT 	MFP_CFG_OUT(GPIO81, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define GPIO81_SSP2_CLK_IN  	MFP_CFG_IN(GPIO81, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define GPIO82_SSP2_FRM_OUT 	MFP_CFG_OUT(GPIO82, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define GPIO82_SSP2_FRM_IN  	MFP_CFG_IN(GPIO82, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define GPIO83_SSP2_TXD      	MFP_CFG_OUT(GPIO83, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define GPIO83_SSP2_RXD      	MFP_CFG_IN(GPIO83, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define GPIO84_SSP2_TXD      	MFP_CFG_OUT(GPIO84, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define GPIO84_SSP2_RXD      	MFP_CFG_IN(GPIO84, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* MMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define GPIO6_MMC_CLK		MFP_CFG_OUT(GPIO6, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define GPIO8_MMC_CS0		MFP_CFG_OUT(GPIO8, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define GPIO9_MMC_CS1		MFP_CFG_OUT(GPIO9, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define GPIO34_MMC_CS0		MFP_CFG_OUT(GPIO34, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define GPIO39_MMC_CS1		MFP_CFG_OUT(GPIO39, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define GPIO53_MMC_CLK		MFP_CFG_OUT(GPIO53, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define GPIO54_MMC_CLK		MFP_CFG_OUT(GPIO54, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define GPIO69_MMC_CLK		MFP_CFG_OUT(GPIO69, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define GPIO67_MMC_CS0		MFP_CFG_OUT(GPIO67, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define GPIO68_MMC_CS1		MFP_CFG_OUT(GPIO68, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define GPIO58_LCD_LDD_0	MFP_CFG_OUT(GPIO58, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define GPIO59_LCD_LDD_1	MFP_CFG_OUT(GPIO59, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define GPIO60_LCD_LDD_2	MFP_CFG_OUT(GPIO60, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define GPIO61_LCD_LDD_3	MFP_CFG_OUT(GPIO61, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define GPIO62_LCD_LDD_4	MFP_CFG_OUT(GPIO62, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define GPIO63_LCD_LDD_5	MFP_CFG_OUT(GPIO63, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define GPIO64_LCD_LDD_6	MFP_CFG_OUT(GPIO64, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define GPIO65_LCD_LDD_7	MFP_CFG_OUT(GPIO65, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define GPIO66_LCD_LDD_8	MFP_CFG_OUT(GPIO66, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define GPIO67_LCD_LDD_9	MFP_CFG_OUT(GPIO67, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define GPIO68_LCD_LDD_10	MFP_CFG_OUT(GPIO68, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define GPIO69_LCD_LDD_11	MFP_CFG_OUT(GPIO69, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define GPIO70_LCD_LDD_12	MFP_CFG_OUT(GPIO70, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define GPIO71_LCD_LDD_13	MFP_CFG_OUT(GPIO71, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define GPIO72_LCD_LDD_14	MFP_CFG_OUT(GPIO72, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define GPIO73_LCD_LDD_15	MFP_CFG_OUT(GPIO73, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define GPIO74_LCD_FCLK		MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define GPIO75_LCD_LCLK		MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define GPIO76_LCD_PCLK		MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define GPIO77_LCD_BIAS		MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #ifdef CONFIG_CPU_PXA26x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define GPIO85_GPIO		MFP_CFG_IN(GPIO85, AF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define GPIO86_GPIO		MFP_CFG_IN(GPIO86, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define GPIO87_GPIO		MFP_CFG_IN(GPIO87, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define GPIO88_GPIO		MFP_CFG_IN(GPIO88, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define GPIO89_GPIO		MFP_CFG_IN(GPIO89, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* SDRAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define GPIO86_nSDCS2		MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define GPIO87_nSDCS3		MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define GPIO88_RDnWR		MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* USB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define GPIO9_USB_RCV		MFP_CFG_IN(GPIO9, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define GPIO32_USB_VP		MFP_CFG_IN(GPIO32, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define GPIO34_USB_VM		MFP_CFG_IN(GPIO34, AF2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define GPIO39_USB_VPO		MFP_CFG_OUT(GPIO39, AF3, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define GPIO56_USB_VMO		MFP_CFG_OUT(GPIO56, AF1, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define GPIO57_USB_nOE		MFP_CFG_OUT(GPIO57, AF1, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* ASSP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define GPIO28_ASSP_BITCLK_IN	MFP_CFG_IN(GPIO28, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define GPIO28_ASSP_BITCLK_OUT	MFP_CFG_OUT(GPIO28, AF3, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define GPIO29_ASSP_RXD		MFP_CFG_IN(GPIO29, AF3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define GPIO30_ASSP_TXD		MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define GPIO31_ASSP_SFRM_IN	MFP_CFG_IN(GPIO31, AF1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define GPIO31_ASSP_SFRM_OUT	MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* AC97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define GPIO89_AC97_nRESET	MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #endif	/* CONFIG_CPU_PXA26x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* commonly used pin configurations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define GPIOxx_LCD_16BPP	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	GPIO58_LCD_LDD_0,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	GPIO59_LCD_LDD_1,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	GPIO60_LCD_LDD_2,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	GPIO61_LCD_LDD_3,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	GPIO62_LCD_LDD_4,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	GPIO63_LCD_LDD_5,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	GPIO64_LCD_LDD_6,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	GPIO65_LCD_LDD_7,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	GPIO66_LCD_LDD_8,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	GPIO67_LCD_LDD_9,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	GPIO68_LCD_LDD_10,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	GPIO69_LCD_LDD_11,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	GPIO70_LCD_LDD_12,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	GPIO71_LCD_LDD_13,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	GPIO72_LCD_LDD_14,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	GPIO73_LCD_LDD_15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define GPIOxx_LCD_DSTN_16BPP	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	GPIOxx_LCD_16BPP,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	GPIO74_LCD_FCLK,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	GPIO75_LCD_LCLK,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	GPIO76_LCD_PCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define GPIOxx_LCD_TFT_16BPP	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	GPIOxx_LCD_16BPP,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	GPIO74_LCD_FCLK,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	GPIO75_LCD_LCLK,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	GPIO76_LCD_PCLK,	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	GPIO77_LCD_BIAS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #endif /* __ASM_ARCH_MFP_PXA25X_H */