^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-pxa/idp.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2001 Cliff Brake, Accelent Systems Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * 2001-09-13: Cliff Brake <cbrake@accelent.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Initial code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * 2005-02-15: Cliff Brake <cliff.brake@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * <http://www.vibren.com> <http://bec-systems.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Updated for 2.6 kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "pxa25x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "idp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/platform_data/video-pxafb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <mach/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/platform_data/mmc-pxamci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/smc91x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* TODO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * - add pxa2xx_audio_ops_t device structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * - Ethernet interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static unsigned long idp_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) GPIOxx_LCD_DSTN_16BPP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* BTUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) GPIO42_BTUART_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) GPIO43_BTUART_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) GPIO44_BTUART_CTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) GPIO45_BTUART_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* STUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) GPIO46_STUART_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) GPIO47_STUART_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* MMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) GPIO6_MMC_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) GPIO8_MMC_CS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Ethernet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) GPIO33_nCS_5, /* Ethernet CS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) GPIO4_GPIO, /* Ethernet IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static struct resource smc91x_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .start = (IDP_ETH_PHYS + 0x300),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .end = (IDP_ETH_PHYS + 0xfffff),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .start = PXA_GPIO_TO_IRQ(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .end = PXA_GPIO_TO_IRQ(4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static struct smc91x_platdata smc91x_platdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) SMC91X_USE_DMA | SMC91X_NOWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .pxa_u16_align4 = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static struct platform_device smc91x_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .name = "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .num_resources = ARRAY_SIZE(smc91x_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .resource = smc91x_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .dev.platform_data = &smc91x_platdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static void idp_backlight_power(int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) IDP_CPLD_LCD |= (1<<1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) IDP_CPLD_LCD &= ~(1<<1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static void idp_vlcd(int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) IDP_CPLD_LCD |= (1<<2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) IDP_CPLD_LCD &= ~(1<<2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static void idp_lcd_power(int on, struct fb_var_screeninfo *var)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) IDP_CPLD_LCD |= (1<<0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) IDP_CPLD_LCD &= ~(1<<0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* call idp_vlcd for now as core driver does not support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * both power and vlcd hooks. Note, this is not technically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * the correct sequence, but seems to work. Disclaimer:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * this may eventually damage the display.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) idp_vlcd(on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static struct pxafb_mode_info sharp_lm8v31_mode = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .pixclock = 270000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .xres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .hsync_len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .left_margin = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .right_margin = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .vsync_len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .upper_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .lower_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .cmap_greyscale = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static struct pxafb_mach_info sharp_lm8v31 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .modes = &sharp_lm8v31_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .num_modes = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .cmap_inverse = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .cmap_static = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .lcd_conn = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) LCD_AC_BIAS_FREQ(255),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .pxafb_backlight_power = &idp_backlight_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .pxafb_lcd_power = &idp_lcd_power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static struct pxamci_platform_data idp_mci_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static void __init idp_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) printk("idp_init()\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) pxa2xx_mfp_config(ARRAY_AND_SIZE(idp_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) pxa_set_ffuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) pxa_set_btuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) pxa_set_stuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) platform_device_register(&smc91x_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) //platform_device_register(&mst_audio_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) pxa_set_fb_info(NULL, &sharp_lm8v31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) pxa_set_mci_info(&idp_mci_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static struct map_desc idp_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .virtual = IDP_COREVOLT_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .pfn = __phys_to_pfn(IDP_COREVOLT_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .length = IDP_COREVOLT_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .virtual = IDP_CPLD_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .pfn = __phys_to_pfn(IDP_CPLD_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .length = IDP_CPLD_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static void __init idp_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) pxa25x_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* LEDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct idp_led {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct led_classdev cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) u8 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * The triggers lines up below will only be used if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * LED triggers are compiled in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) const char *trigger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) } idp_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) { "idp:green", "heartbeat", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) { "idp:red", "cpu0", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static void idp_led_set(struct led_classdev *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) enum led_brightness b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct idp_led *led = container_of(cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct idp_led, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u32 reg = IDP_CPLD_LED_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (b != LED_OFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) reg &= ~led->mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) reg |= led->mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) IDP_CPLD_LED_CONTROL = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static enum led_brightness idp_led_get(struct led_classdev *cdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct idp_led *led = container_of(cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct idp_led, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return (IDP_CPLD_LED_CONTROL & led->mask) ? LED_OFF : LED_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int __init idp_leds_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (!machine_is_pxa_idp())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) for (i = 0; i < ARRAY_SIZE(idp_leds); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct idp_led *led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) led = kzalloc(sizeof(*led), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (!led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) led->cdev.name = idp_leds[i].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) led->cdev.brightness_set = idp_led_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) led->cdev.brightness_get = idp_led_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) led->cdev.default_trigger = idp_leds[i].trigger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (i == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) led->mask = IDP_HB_LED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) led->mask = IDP_BUSY_LED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (led_classdev_register(NULL, &led->cdev) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) kfree(led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * Since we may have triggers on any subsystem, defer registration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * until after subsystem_init.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) fs_initcall(idp_leds_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* Maintainer: Vibren Technologies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .map_io = idp_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .nr_irqs = PXA_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .init_irq = pxa25x_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .handle_irq = pxa25x_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .init_time = pxa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .init_machine = idp_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .restart = pxa_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) MACHINE_END