^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Hardware definitions for HP iPAQ h5xxx Handheld Computers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright(20)02 Hewlett-Packard Company.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * FITNESS FOR ANY PARTICULAR PURPOSE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Author: Jamey Hicks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifndef __ASM_ARCH_H5000_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define __ASM_ARCH_H5000_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "mfp-pxa25x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * CPU GPIOs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define H5000_GPIO_POWER_BUTTON (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define H5000_GPIO_RESET_BUTTON_N (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define H5000_GPIO_OPT_INT (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define H5000_GPIO_BACKUP_POWER (3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define H5000_GPIO_ACTION_BUTTON (4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define H5000_GPIO_COM_DCD_SOMETHING (5) /* what is this really ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* 6 not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define H5000_GPIO_RESET_BUTTON_AGAIN_N (7) /* connected to gpio 1 as well */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* 8 not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define H5000_GPIO_RSO_N (9) /* reset output from max1702 which regulates 3.3 and 2.5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define H5000_GPIO_ASIC_INT_N (10) /* from companion asic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define H5000_GPIO_BT_ENV_0 (11) /* to LMX9814, set to 1 according to regdump */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*(12) not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define H5000_GPIO_BT_ENV_1 (13) /* to LMX9814, set to 1 according to regdump */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define H5000_GPIO_BT_WU (14) /* from LMX9814, Defined as HOST_WAKEUP in the LMX9820 data sheet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*(15) is CS1# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /*(16) not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*(17) not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*(18) is pcmcia ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*(19) is dreq1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*(20) is dreq0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define H5000_GPIO_OE_RD_NWR (21) /* output enable on rd/nwr signal to companion asic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /*(22) is not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define H5000_GPIO_OPT_SPI_CLK (23) /* to extension pack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define H5000_GPIO_OPT_SPI_CS_N (24) /* to extension pack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define H5000_GPIO_OPT_SPI_DOUT (25) /* to extension pack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define H5000_GPIO_OPT_SPI_DIN (26) /* to extension pack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*(27) not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define H5000_GPIO_I2S_BITCLK (28) /* connected to AC97 codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define H5000_GPIO_I2S_DATAOUT (29) /* connected to AC97 codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define H5000_GPIO_I2S_DATAIN (30) /* connected to AC97 codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define H5000_GPIO_I2S_LRCLK (31) /* connected to AC97 codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define H5000_GPIO_I2S_SYSCLK (32) /* connected to AC97 codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /*(33) is CS5# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define H5000_GPIO_COM_RXD (34) /* connected to cradle/cable connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define H5000_GPIO_COM_CTS (35) /* connected to cradle/cable connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define H5000_GPIO_COM_DCD (36) /* connected to cradle/cable connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define H5000_GPIO_COM_DSR (37) /* connected to cradle/cable connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define H5000_GPIO_COM_RI (38) /* connected to cradle/cable connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define H5000_GPIO_COM_TXD (39) /* connected to cradle/cable connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define H5000_GPIO_COM_DTR (40) /* connected to cradle/cable connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define H5000_GPIO_COM_RTS (41) /* connected to cradle/cable connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define H5000_GPIO_BT_RXD (42) /* connected to BT (LMX9814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define H5000_GPIO_BT_TXD (43) /* connected to BT (LMX9814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define H5000_GPIO_BT_CTS (44) /* connected to BT (LMX9814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define H5000_GPIO_BT_RTS (45) /* connected to BT (LMX9814) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define H5000_GPIO_IRDA_RXD (46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define H5000_GPIO_IRDA_TXD (47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define H5000_GPIO_POE_N (48) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define H5000_GPIO_PWE_N (49) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define H5000_GPIO_PIOR_N (50) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define H5000_GPIO_PIOW_N (51) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define H5000_GPIO_PCE1_N (52) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define H5000_GPIO_PCE2_N (53) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define H5000_GPIO_PSKTSEL (54) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define H5000_GPIO_PREG_N (55) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define H5000_GPIO_PWAIT_N (56) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define H5000_GPIO_IOIS16_N (57) /* used for pcmcia */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define H5000_GPIO_IRDA_SD (58) /* to hsdl3002 sd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /*(59) not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define H5000_GPIO_POWER_SD_N (60) /* controls power to SD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define H5000_GPIO_POWER_RS232_N (61) /* inverted FORCEON to rs232 transceiver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define H5000_GPIO_POWER_ACCEL_N (62) /* controls power to accel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /*(63) is not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define H5000_GPIO_OPT_NVRAM (64) /* controls power to expansion pack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define H5000_GPIO_CHG_EN (65) /* to sc801 en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define H5000_GPIO_USB_PULLUP (66) /* USB d+ pullup via 1.5K resistor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define H5000_GPIO_BT_2V8_N (67) /* 2.8V used by bluetooth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define H5000_GPIO_EXT_CHG_RATE (68) /* enables external charging rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /*(69) is not connected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define H5000_GPIO_CIR_RESET (70) /* consumer IR reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define H5000_GPIO_POWER_LIGHT_SENSOR_N (71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define H5000_GPIO_BT_M_RESET (72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define H5000_GPIO_STD_CHG_RATE (73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define H5000_GPIO_SD_WP_N (74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define H5000_GPIO_MOTOR_ON_N (75) /* external pullup on this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define H5000_GPIO_HEADPHONE_DETECT (76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define H5000_GPIO_USB_CHG_RATE (77) /* select rate for charging via usb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /*(78) is CS2# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*(79) is CS3# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*(80) is CS4# */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #endif /* __ASM_ARCH_H5000_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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