^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/clkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/dmaengine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/spi/pxa2xx_spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_data/i2c-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "udc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_data/usb-pxa3xx-ulpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_data/video-pxafb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_data/mmc-pxamci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_data/irda-pxaficp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/platform_data/usb-ohci-pxa27x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_data/keypad-pxa27x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_data/media/camera-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <mach/audio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_data/mmp_dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/platform_data/mtd-nand-pxa3xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void __init pxa_register_device(struct platform_device *dev, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) dev->dev.platform_data = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ret = platform_device_register(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) dev_err(&dev->dev, "unable to register device: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static struct resource pxa_resource_pmu = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .start = IRQ_PMU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .end = IRQ_PMU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct platform_device pxa_device_pmu = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .name = "xscale-pmu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .resource = &pxa_resource_pmu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static struct resource pxamci_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .start = 0x41100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .end = 0x41100fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .start = IRQ_MMC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .end = IRQ_MMC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static u64 pxamci_dmamask = 0xffffffffUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct platform_device pxa_device_mci = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .name = "pxa2xx-mci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .dma_mask = &pxamci_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .num_resources = ARRAY_SIZE(pxamci_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .resource = pxamci_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) void __init pxa_set_mci_info(struct pxamci_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) pxa_register_device(&pxa_device_mci, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static struct pxa2xx_udc_mach_info pxa_udc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .gpio_pullup = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) memcpy(&pxa_udc_info, info, sizeof *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static struct resource pxa2xx_udc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .start = 0x40600000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .end = 0x4060ffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .start = IRQ_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .end = IRQ_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static u64 udc_dma_mask = ~(u32)0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct platform_device pxa25x_device_udc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .name = "pxa25x-udc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .resource = pxa2xx_udc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .platform_data = &pxa_udc_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .dma_mask = &udc_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct platform_device pxa27x_device_udc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .name = "pxa27x-udc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .resource = pxa2xx_udc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .platform_data = &pxa_udc_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .dma_mask = &udc_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #ifdef CONFIG_PXA3xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static struct resource pxa3xx_u2d_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .start = 0x54100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .end = 0x54100fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .start = IRQ_USB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .end = IRQ_USB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct platform_device pxa3xx_device_u2d = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .name = "pxa3xx-u2d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .resource = pxa3xx_u2d_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) pxa_register_device(&pxa3xx_device_u2d, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #endif /* CONFIG_PXA3xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static struct resource pxafb_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .start = 0x44000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .end = 0x4400ffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .start = IRQ_LCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .end = IRQ_LCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static u64 fb_dma_mask = ~(u64)0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct platform_device pxa_device_fb = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .name = "pxa2xx-fb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .dma_mask = &fb_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .num_resources = ARRAY_SIZE(pxafb_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .resource = pxafb_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) pxa_device_fb.dev.parent = parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) pxa_register_device(&pxa_device_fb, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static struct resource pxa_resource_ffuart[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .start = 0x40100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .end = 0x40100023,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .start = IRQ_FFUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .end = IRQ_FFUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct platform_device pxa_device_ffuart = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .name = "pxa2xx-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .resource = pxa_resource_ffuart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) void __init pxa_set_ffuart_info(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) pxa_register_device(&pxa_device_ffuart, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static struct resource pxa_resource_btuart[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .start = 0x40200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .end = 0x40200023,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .start = IRQ_BTUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .end = IRQ_BTUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct platform_device pxa_device_btuart = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .name = "pxa2xx-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .resource = pxa_resource_btuart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .num_resources = ARRAY_SIZE(pxa_resource_btuart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) void __init pxa_set_btuart_info(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) pxa_register_device(&pxa_device_btuart, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static struct resource pxa_resource_stuart[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .start = 0x40700000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .end = 0x40700023,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .start = IRQ_STUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .end = IRQ_STUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) struct platform_device pxa_device_stuart = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .name = "pxa2xx-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .resource = pxa_resource_stuart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .num_resources = ARRAY_SIZE(pxa_resource_stuart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) void __init pxa_set_stuart_info(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) pxa_register_device(&pxa_device_stuart, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static struct resource pxa_resource_hwuart[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .start = 0x41600000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .end = 0x4160002F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .start = IRQ_HWUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .end = IRQ_HWUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) struct platform_device pxa_device_hwuart = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .name = "pxa2xx-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .id = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .resource = pxa_resource_hwuart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) void __init pxa_set_hwuart_info(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (cpu_is_pxa255())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) pxa_register_device(&pxa_device_hwuart, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static struct resource pxai2c_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .start = 0x40301680,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .end = 0x403016a3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .start = IRQ_I2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .end = IRQ_I2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct platform_device pxa_device_i2c = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .name = "pxa2xx-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .resource = pxai2c_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) .num_resources = ARRAY_SIZE(pxai2c_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) pxa_register_device(&pxa_device_i2c, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #ifdef CONFIG_PXA27x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static struct resource pxa27x_resources_i2c_power[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .start = 0x40f00180,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .end = 0x40f001a3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .start = IRQ_PWRI2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .end = IRQ_PWRI2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct platform_device pxa27x_device_i2c_power = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .name = "pxa2xx-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .resource = pxa27x_resources_i2c_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) static struct resource pxai2s_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .start = 0x40400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .end = 0x40400083,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .start = IRQ_I2S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .end = IRQ_I2S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct platform_device pxa_device_i2s = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .name = "pxa2xx-i2s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .resource = pxai2s_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .num_resources = ARRAY_SIZE(pxai2s_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) struct platform_device pxa_device_asoc_ssp1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .name = "pxa-ssp-dai",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) struct platform_device pxa_device_asoc_ssp2= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .name = "pxa-ssp-dai",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct platform_device pxa_device_asoc_ssp3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .name = "pxa-ssp-dai",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) struct platform_device pxa_device_asoc_ssp4 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .name = "pxa-ssp-dai",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .id = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct platform_device pxa_device_asoc_platform = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .name = "pxa-pcm-audio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static u64 pxaficp_dmamask = ~(u32)0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) static struct resource pxa_ir_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .start = IRQ_STUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .end = IRQ_STUART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .start = IRQ_ICP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .end = IRQ_ICP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) [3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .start = 0x40800000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .end = 0x4080001b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) [4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .start = 0x40700000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .end = 0x40700023,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct platform_device pxa_device_ficp = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .name = "pxa2xx-ir",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .num_resources = ARRAY_SIZE(pxa_ir_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .resource = pxa_ir_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .dma_mask = &pxaficp_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) pxa_register_device(&pxa_device_ficp, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static struct resource pxa_rtc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .start = 0x40900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .end = 0x40900000 + 0x3b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .start = IRQ_RTC1Hz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .end = IRQ_RTC1Hz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .name = "rtc 1Hz",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .start = IRQ_RTCAlrm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .end = IRQ_RTCAlrm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .name = "rtc alarm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct platform_device pxa_device_rtc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .name = "pxa-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .num_resources = ARRAY_SIZE(pxa_rtc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .resource = pxa_rtc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) struct platform_device sa1100_device_rtc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .name = "sa1100-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .num_resources = ARRAY_SIZE(pxa_rtc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .resource = pxa_rtc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static struct resource pxa_ac97_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .start = 0x40500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .end = 0x40500000 + 0xfff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .start = IRQ_AC97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .end = IRQ_AC97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static u64 pxa_ac97_dmamask = 0xffffffffUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) struct platform_device pxa_device_ac97 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .name = "pxa2xx-ac97",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .dma_mask = &pxa_ac97_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .num_resources = ARRAY_SIZE(pxa_ac97_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .resource = pxa_ac97_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) &pxa_device_ac97.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) pr_err("PXA AC97 clock1 alias error: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) &pxa_device_ac97.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) pr_err("PXA AC97 clock2 alias error: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) pxa_register_device(&pxa_device_ac97, ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #ifdef CONFIG_PXA25x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static struct resource pxa25x_resource_pwm0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .start = 0x40b00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .end = 0x40b0000f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct platform_device pxa25x_device_pwm0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .name = "pxa25x-pwm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .resource = pxa25x_resource_pwm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static struct resource pxa25x_resource_pwm1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) .start = 0x40c00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .end = 0x40c0000f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) struct platform_device pxa25x_device_pwm1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .name = "pxa25x-pwm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .resource = pxa25x_resource_pwm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static struct resource pxa25x_resource_ssp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) .start = 0x41000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .end = 0x4100001f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .start = IRQ_SSP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) .end = IRQ_SSP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) struct platform_device pxa25x_device_ssp = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .name = "pxa25x-ssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) .dma_mask = &pxa25x_ssp_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .resource = pxa25x_resource_ssp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) static struct resource pxa25x_resource_nssp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) .start = 0x41400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) .end = 0x4140002f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) .start = IRQ_NSSP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) .end = IRQ_NSSP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) struct platform_device pxa25x_device_nssp = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .name = "pxa25x-nssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .dma_mask = &pxa25x_nssp_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .resource = pxa25x_resource_nssp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) static struct resource pxa25x_resource_assp[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .start = 0x41500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .end = 0x4150002f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) .start = IRQ_ASSP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) .end = IRQ_ASSP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct platform_device pxa25x_device_assp = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) /* ASSP is basically equivalent to NSSP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) .name = "pxa25x-nssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) .id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .dma_mask = &pxa25x_assp_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) .resource = pxa25x_resource_assp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) #endif /* CONFIG_PXA25x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) static struct resource pxa27x_resource_camera[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) .start = 0x50000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .end = 0x50000fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .start = IRQ_CAMERA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .end = IRQ_CAMERA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static struct platform_device pxa27x_device_camera = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .name = "pxa27x-camera",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .id = 0, /* This is used to put cameras on this interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) .dma_mask = &pxa27x_dma_mask_camera,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) .resource = pxa27x_resource_camera,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) pxa_register_device(&pxa27x_device_camera, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static struct resource pxa27x_resource_ohci[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) .start = 0x4C000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .end = 0x4C00ff6f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .start = IRQ_USBH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .end = IRQ_USBH1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) struct platform_device pxa27x_device_ohci = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .name = "pxa27x-ohci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .dma_mask = &pxa27x_ohci_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .resource = pxa27x_resource_ohci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) pxa_register_device(&pxa27x_device_ohci, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static struct resource pxa27x_resource_keypad[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) .start = 0x41500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .end = 0x4150004c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .start = IRQ_KEYPAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) .end = IRQ_KEYPAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct platform_device pxa27x_device_keypad = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .name = "pxa27x-keypad",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) .resource = pxa27x_resource_keypad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) pxa_register_device(&pxa27x_device_keypad, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static struct resource pxa27x_resource_ssp1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) .start = 0x41000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) .end = 0x4100003f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) .start = IRQ_SSP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) .end = IRQ_SSP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) struct platform_device pxa27x_device_ssp1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .name = "pxa27x-ssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .dma_mask = &pxa27x_ssp1_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) .resource = pxa27x_resource_ssp1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static struct resource pxa27x_resource_ssp2[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .start = 0x41700000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .end = 0x4170003f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) .start = IRQ_SSP2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .end = IRQ_SSP2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) struct platform_device pxa27x_device_ssp2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .name = "pxa27x-ssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .dma_mask = &pxa27x_ssp2_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .resource = pxa27x_resource_ssp2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) static struct resource pxa27x_resource_ssp3[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) .start = 0x41900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) .end = 0x4190003f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) .start = IRQ_SSP3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) .end = IRQ_SSP3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) struct platform_device pxa27x_device_ssp3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .name = "pxa27x-ssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) .id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) .dma_mask = &pxa27x_ssp3_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .resource = pxa27x_resource_ssp3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) static struct resource pxa27x_resource_pwm0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .start = 0x40b00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) .end = 0x40b0001f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) struct platform_device pxa27x_device_pwm0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) .name = "pxa27x-pwm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) .resource = pxa27x_resource_pwm0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) static struct resource pxa27x_resource_pwm1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) .start = 0x40c00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) .end = 0x40c0001f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) struct platform_device pxa27x_device_pwm1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) .name = "pxa27x-pwm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .resource = pxa27x_resource_pwm1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) #ifdef CONFIG_PXA3xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) static struct resource pxa3xx_resources_mci2[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .start = 0x42000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) .end = 0x42000fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) .start = IRQ_MMC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) .end = IRQ_MMC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) struct platform_device pxa3xx_device_mci2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .name = "pxa2xx-mci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .dma_mask = &pxamci_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) .resource = pxa3xx_resources_mci2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) pxa_register_device(&pxa3xx_device_mci2, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) static struct resource pxa3xx_resources_mci3[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) .start = 0x42500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) .end = 0x42500fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .start = IRQ_MMC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .end = IRQ_MMC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) struct platform_device pxa3xx_device_mci3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) .name = "pxa2xx-mci",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) .dma_mask = &pxamci_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) .resource = pxa3xx_resources_mci3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) pxa_register_device(&pxa3xx_device_mci3, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) static struct resource pxa3xx_resources_gcu[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) .start = 0x54000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) .end = 0x54000fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .start = IRQ_GCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) .end = IRQ_GCU,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) struct platform_device pxa3xx_device_gcu = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .name = "pxa3xx-gcu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .resource = pxa3xx_resources_gcu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .dma_mask = &pxa3xx_gcu_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) #endif /* CONFIG_PXA3xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) #if defined(CONFIG_PXA3xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) static struct resource pxa3xx_resources_i2c_power[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) .start = 0x40f500c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) .end = 0x40f500d3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) .start = IRQ_PWRI2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) .end = IRQ_PWRI2C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) struct platform_device pxa3xx_device_i2c_power = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) .name = "pxa3xx-pwri2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) .resource = pxa3xx_resources_i2c_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) static struct resource pxa3xx_resources_nand[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) .start = 0x43100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) .end = 0x43100053,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) .start = IRQ_NAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) .end = IRQ_NAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) struct platform_device pxa3xx_device_nand = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) .name = "pxa3xx-nand",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) .dma_mask = &pxa3xx_nand_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) .resource = pxa3xx_resources_nand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) pxa_register_device(&pxa3xx_device_nand, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) static struct resource pxa3xx_resource_ssp4[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) .start = 0x41a00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) .end = 0x41a0003f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) .start = IRQ_SSP4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .end = IRQ_SSP4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) * PXA3xx SSP is basically equivalent to PXA27x.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) * However, we need to register the device by the correct name in order to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) * make the driver set the correct internal type, hence we provide specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) * platform_devices for each of them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) struct platform_device pxa3xx_device_ssp1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) .name = "pxa3xx-ssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) .dma_mask = &pxa27x_ssp1_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) .resource = pxa27x_resource_ssp1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) struct platform_device pxa3xx_device_ssp2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) .name = "pxa3xx-ssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .dma_mask = &pxa27x_ssp2_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) .resource = pxa27x_resource_ssp2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) struct platform_device pxa3xx_device_ssp3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) .name = "pxa3xx-ssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) .id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) .dma_mask = &pxa27x_ssp3_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) .resource = pxa27x_resource_ssp3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) struct platform_device pxa3xx_device_ssp4 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) .name = "pxa3xx-ssp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) .id = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) .dma_mask = &pxa3xx_ssp4_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) .resource = pxa3xx_resource_ssp4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) #endif /* CONFIG_PXA3xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) struct resource pxa_resource_gpio[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) .start = 0x40e00000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) .end = 0x40e0ffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) .start = IRQ_GPIO0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) .end = IRQ_GPIO0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) .name = "gpio0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) .start = IRQ_GPIO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) .end = IRQ_GPIO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) .name = "gpio1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) .start = IRQ_GPIO_2_x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) .end = IRQ_GPIO_2_x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) .name = "gpio_mux",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) struct platform_device pxa25x_device_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) #ifdef CONFIG_CPU_PXA26x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) .name = "pxa26x-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) .name = "pxa25x-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) .num_resources = ARRAY_SIZE(pxa_resource_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) .resource = pxa_resource_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) struct platform_device pxa27x_device_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) .name = "pxa27x-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) .num_resources = ARRAY_SIZE(pxa_resource_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) .resource = pxa_resource_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) struct platform_device pxa3xx_device_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) .name = "pxa3xx-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) .num_resources = ARRAY_SIZE(pxa_resource_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) .resource = pxa_resource_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) struct platform_device pxa93x_device_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) .name = "pxa93x-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) .num_resources = ARRAY_SIZE(pxa_resource_gpio),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) .resource = pxa_resource_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) struct platform_device *pd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) pd = platform_device_alloc("pxa2xx-spi", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) if (pd == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) pd->dev.platform_data = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) platform_device_add(pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) static struct resource pxa_dma_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) .start = 0x40000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) .end = 0x4000ffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) .start = IRQ_DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) .end = IRQ_DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) static u64 pxadma_dmamask = 0xffffffffUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) static struct platform_device pxa2xx_pxa_dma = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) .name = "pxa-dma",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) .dma_mask = &pxadma_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) .num_resources = ARRAY_SIZE(pxa_dma_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) .resource = pxa_dma_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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