^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-pxa/cm-x300.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Support for the CompuLab CM-X300 modules
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2008,2009 CompuLab Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Mike Rapoport <mike@compulab.co.il>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Igor Grinberg <grinberg@compulab.co.il>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define pr_fmt(fmt) "%s: " fmt, __func__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/dm9000.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/platform_data/rtc-v3020.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/pwm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/pwm_backlight.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/platform_data/pca953x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/platform_data/i2c-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/mfd/da903x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/power_supply.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/apm-emulation.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/spi/spi_gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/spi/tdo24m.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <asm/system_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include "pxa300.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include "pxa27x-udc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/platform_data/video-pxafb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/platform_data/mmc-pxamci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/platform_data/usb-ohci-pxa27x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/platform_data/mtd-nand-pxa3xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <mach/audio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/platform_data/usb-pxa3xx-ulpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define CM_X300_ETH_PHYS 0x08000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define GPIO82_MMC_IRQ (82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define GPIO85_MMC_WP (85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define GPIO95_RTC_CS (95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define GPIO96_RTC_WR (96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define GPIO97_RTC_RD (97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define GPIO98_RTC_IO (98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define GPIO_ULPI_PHY_RST (127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) GPIO54_LCD_LDD_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) GPIO55_LCD_LDD_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) GPIO56_LCD_LDD_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) GPIO57_LCD_LDD_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) GPIO58_LCD_LDD_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) GPIO59_LCD_LDD_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) GPIO60_LCD_LDD_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) GPIO61_LCD_LDD_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) GPIO62_LCD_LDD_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) GPIO63_LCD_LDD_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) GPIO64_LCD_LDD_10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) GPIO65_LCD_LDD_11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) GPIO66_LCD_LDD_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) GPIO67_LCD_LDD_13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) GPIO68_LCD_LDD_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) GPIO69_LCD_LDD_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) GPIO72_LCD_FCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) GPIO73_LCD_LCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) GPIO74_LCD_PCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) GPIO75_LCD_BIAS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* BTUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) GPIO111_UART2_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) GPIO113_UART2_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* STUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) GPIO109_UART3_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* AC97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) GPIO23_AC97_nACRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) GPIO24_AC97_SYSCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) GPIO29_AC97_BITCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) GPIO25_AC97_SDATA_IN_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) GPIO27_AC97_SDATA_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) GPIO28_AC97_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* Keypad */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) GPIO121_KP_MKOUT_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) GPIO122_KP_MKOUT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) GPIO123_KP_MKOUT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) GPIO124_KP_MKOUT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) GPIO125_KP_MKOUT_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) GPIO4_2_KP_MKOUT_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* MMC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) GPIO3_MMC1_DAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) GPIO5_MMC1_DAT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) GPIO6_MMC1_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) GPIO7_MMC1_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) GPIO8_MMC1_CMD, /* CMD0 for slot 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* MMC2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) GPIO9_MMC2_DAT0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) GPIO11_MMC2_DAT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) GPIO12_MMC2_DAT3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) GPIO13_MMC2_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) GPIO14_MMC2_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* FFUART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) GPIO31_UART1_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) GPIO32_UART1_CTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) GPIO37_UART1_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) GPIO33_UART1_DCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) GPIO35_UART1_RI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) GPIO36_UART1_DTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* GPIOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) GPIO85_GPIO, /* MMC WP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) GPIO99_GPIO, /* Ethernet IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) /* RTC GPIOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) GPIO95_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC CS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC WR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) GPIO97_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC RD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) GPIO98_GPIO, /* RTC IO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* Standard I2C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) GPIO21_I2C_SCL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) GPIO22_I2C_SDA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* PWM Backlight */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) GPIO19_PWM2_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static mfp_cfg_t cm_x3xx_rev_lt130_mfp_cfg[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* GPIOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) GPIO79_GPIO, /* LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) GPIO77_GPIO, /* WiFi reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) GPIO78_GPIO, /* BT reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static mfp_cfg_t cm_x3xx_rev_ge130_mfp_cfg[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* GPIOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) GPIO76_GPIO, /* LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) GPIO71_GPIO, /* WiFi reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) GPIO70_GPIO, /* BT reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static mfp_cfg_t cm_x310_mfp_cfg[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /* USB PORT 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ULPI_STP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ULPI_NXT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) ULPI_DIR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) GPIO30_ULPI_DATA_OUT_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) GPIO31_ULPI_DATA_OUT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) GPIO32_ULPI_DATA_OUT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) GPIO33_ULPI_DATA_OUT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) GPIO34_ULPI_DATA_OUT_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) GPIO35_ULPI_DATA_OUT_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) GPIO36_ULPI_DATA_OUT_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) GPIO37_ULPI_DATA_OUT_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) GPIO38_ULPI_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /* external PHY reset pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) GPIO127_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* USB PORT 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) GPIO77_USB_P3_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) GPIO78_USB_P3_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) GPIO79_USB_P3_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) GPIO80_USB_P3_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) GPIO81_USB_P3_5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) GPIO82_USB_P3_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) GPIO0_2_USBH_PEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static struct resource dm9000_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .start = CM_X300_ETH_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .end = CM_X300_ETH_PHYS + 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .start = CM_X300_ETH_PHYS + 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .end = CM_X300_ETH_PHYS + 0x4 + 500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static struct dm9000_plat_data cm_x300_dm9000_platdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static struct platform_device dm9000_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .name = "dm9000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .num_resources = ARRAY_SIZE(dm9000_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .resource = dm9000_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .platform_data = &cm_x300_dm9000_platdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static void __init cm_x300_init_dm9000(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) platform_device_register(&dm9000_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static inline void cm_x300_init_dm9000(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static struct pxafb_mode_info cm_x300_lcd_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .pixclock = 38250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .xres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .yres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .hsync_len = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .vsync_len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .left_margin = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .upper_margin = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .right_margin = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .lower_margin = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .cmap_greyscale = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .pixclock = 153800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .xres = 240,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .yres = 320,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .hsync_len = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .vsync_len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .left_margin = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .upper_margin = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .right_margin = 88,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .lower_margin = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .cmap_greyscale = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) static struct pxafb_mach_info cm_x300_lcd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .modes = cm_x300_lcd_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .num_modes = ARRAY_SIZE(cm_x300_lcd_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static void __init cm_x300_init_lcd(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) pxa_set_fb_info(NULL, &cm_x300_lcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) static inline void cm_x300_init_lcd(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) static struct pwm_lookup cm_x300_pwm_lookup[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) PWM_LOOKUP("pxa27x-pwm.0", 1, "pwm-backlight.0", NULL, 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) PWM_POLARITY_NORMAL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static struct platform_pwm_backlight_data cm_x300_backlight_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .max_brightness = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .dft_brightness = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static struct platform_device cm_x300_backlight_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .name = "pwm-backlight",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .parent = &pxa27x_device_pwm0.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .platform_data = &cm_x300_backlight_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static void cm_x300_init_bl(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) pwm_add_table(cm_x300_pwm_lookup, ARRAY_SIZE(cm_x300_pwm_lookup));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) platform_device_register(&cm_x300_backlight_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static inline void cm_x300_init_bl(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #if defined(CONFIG_SPI_GPIO) || defined(CONFIG_SPI_GPIO_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define GPIO_LCD_BASE (144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define GPIO_LCD_DIN (GPIO_LCD_BASE + 8) /* aux_gpio3_0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define GPIO_LCD_DOUT (GPIO_LCD_BASE + 9) /* aux_gpio3_1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define GPIO_LCD_SCL (GPIO_LCD_BASE + 10) /* aux_gpio3_2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #define GPIO_LCD_CS (GPIO_LCD_BASE + 11) /* aux_gpio3_3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define LCD_SPI_BUS_NUM (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static struct spi_gpio_platform_data cm_x300_spi_gpio_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .num_chipselect = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static struct platform_device cm_x300_spi_gpio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .name = "spi_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .id = LCD_SPI_BUS_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .platform_data = &cm_x300_spi_gpio_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static struct gpiod_lookup_table cm_x300_spi_gpiod_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .dev_id = "spi_gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) GPIO_LOOKUP("gpio-pxa", GPIO_LCD_SCL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) "sck", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) GPIO_LOOKUP("gpio-pxa", GPIO_LCD_DIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) "mosi", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) GPIO_LOOKUP("gpio-pxa", GPIO_LCD_DOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) "miso", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) GPIO_LOOKUP("gpio-pxa", GPIO_LCD_CS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) "cs", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static struct tdo24m_platform_data cm_x300_tdo24m_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .model = TDO35S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static struct spi_board_info cm_x300_spi_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .modalias = "tdo24m",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .max_speed_hz = 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .bus_num = LCD_SPI_BUS_NUM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .chip_select = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .platform_data = &cm_x300_tdo24m_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static void __init cm_x300_init_spi(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) spi_register_board_info(cm_x300_spi_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ARRAY_SIZE(cm_x300_spi_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) gpiod_add_lookup_table(&cm_x300_spi_gpiod_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) platform_device_register(&cm_x300_spi_gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static inline void cm_x300_init_spi(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #if defined(CONFIG_SND_PXA2XX_LIB_AC97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static void __init cm_x300_init_ac97(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) pxa_set_ac97_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static inline void cm_x300_init_ac97(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #if IS_ENABLED(CONFIG_MTD_NAND_MARVELL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static struct mtd_partition cm_x300_nand_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .name = "OBM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .size = SZ_256K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .mask_flags = MTD_WRITEABLE, /* force read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .name = "U-Boot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .size = SZ_256K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .mask_flags = MTD_WRITEABLE, /* force read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .name = "Environment",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .size = SZ_256K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) [3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .name = "reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .size = SZ_256K + SZ_1M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .mask_flags = MTD_WRITEABLE, /* force read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) [4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .name = "kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .size = SZ_4M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) [5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .name = "fs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static struct pxa3xx_nand_platform_data cm_x300_nand_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .keep_config = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .parts = cm_x300_nand_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static void __init cm_x300_init_nand(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) pxa3xx_set_nand_info(&cm_x300_nand_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static inline void cm_x300_init_nand(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static struct pxamci_platform_data cm_x300_mci_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .detect_delay_ms = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static struct gpiod_lookup_table cm_x300_mci_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .dev_id = "pxa2xx-mci.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /* Card detect on GPIO 82 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) GPIO_LOOKUP("gpio-pxa", GPIO82_MMC_IRQ, "cd", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) /* Write protect on GPIO 85 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) GPIO_LOOKUP("gpio-pxa", GPIO85_MMC_WP, "wp", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /* The second MMC slot of CM-X300 is hardwired to Libertas card and has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) no detection/ro pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static int cm_x300_mci2_init(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) irq_handler_t cm_x300_detect_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static void cm_x300_mci2_exit(struct device *dev, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) static struct pxamci_platform_data cm_x300_mci2_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .detect_delay_ms = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .init = cm_x300_mci2_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .exit = cm_x300_mci2_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static void __init cm_x300_init_mmc(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) gpiod_add_lookup_table(&cm_x300_mci_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) pxa_set_mci_info(&cm_x300_mci_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static inline void cm_x300_init_mmc(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #if defined(CONFIG_PXA310_ULPI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static struct clk *pout_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) static int cm_x300_ulpi_phy_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /* reset the PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) err = gpio_request_one(GPIO_ULPI_PHY_RST, GPIOF_OUT_INIT_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) "ulpi reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) pr_err("failed to request ULPI reset GPIO: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) gpio_set_value(GPIO_ULPI_PHY_RST, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) gpio_free(GPIO_ULPI_PHY_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static int cm_x300_u2d_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (cpu_is_pxa310()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /* CLK_POUT is connected to the ULPI PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) pout_clk = clk_get(NULL, "CLK_POUT");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (IS_ERR(pout_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) err = PTR_ERR(pout_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) pr_err("failed to get CLK_POUT: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) clk_prepare_enable(pout_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) err = cm_x300_ulpi_phy_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) clk_disable(pout_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) clk_put(pout_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static void cm_x300_u2d_exit(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (cpu_is_pxa310()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) clk_disable_unprepare(pout_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) clk_put(pout_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static struct pxa3xx_u2d_platform_data cm_x300_u2d_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) .ulpi_mode = ULPI_SER_6PIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) .init = cm_x300_u2d_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .exit = cm_x300_u2d_exit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static void __init cm_x300_init_u2d(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) pxa3xx_set_u2d_info(&cm_x300_u2d_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) static inline void cm_x300_init_u2d(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) static int cm_x300_ohci_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (cpu_is_pxa300())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) UP2OCR = UP2OCR_HXS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) | UP2OCR_HXOE | UP2OCR_DMPDE | UP2OCR_DPPDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static struct pxaohci_platform_data cm_x300_ohci_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .port_mode = PMM_PERPORT_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .init = cm_x300_ohci_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) static void __init cm_x300_init_ohci(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) pxa_set_ohci_info(&cm_x300_ohci_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static inline void cm_x300_init_ohci(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static struct gpio_led cm_x300_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) .name = "cm-x300:green",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) .default_trigger = "heartbeat",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) static struct gpio_led_platform_data cm_x300_gpio_led_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) .num_leds = ARRAY_SIZE(cm_x300_leds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) .leds = cm_x300_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) static struct platform_device cm_x300_led_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .platform_data = &cm_x300_gpio_led_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static void __init cm_x300_init_leds(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (system_rev < 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) cm_x300_leds[0].gpio = 79;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) cm_x300_leds[0].gpio = 76;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) platform_device_register(&cm_x300_led_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static inline void cm_x300_init_leds(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) /* PCA9555 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) .gpio_base = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .gpio_base = 144,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) static struct i2c_board_info cm_x300_gpio_ext_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) I2C_BOARD_INFO("pca9555", 0x24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .platform_data = &cm_x300_gpio_ext_pdata_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) I2C_BOARD_INFO("pca9555", 0x25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .platform_data = &cm_x300_gpio_ext_pdata_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static void __init cm_x300_init_i2c(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) pxa_set_i2c_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) i2c_register_board_info(0, cm_x300_gpio_ext_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) ARRAY_SIZE(cm_x300_gpio_ext_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) static inline void cm_x300_init_i2c(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) struct v3020_platform_data cm_x300_v3020_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .use_gpio = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) .gpio_cs = GPIO95_RTC_CS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .gpio_wr = GPIO96_RTC_WR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .gpio_rd = GPIO97_RTC_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .gpio_io = GPIO98_RTC_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static struct platform_device cm_x300_rtc_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .name = "v3020",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .platform_data = &cm_x300_v3020_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static void __init cm_x300_init_rtc(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) platform_device_register(&cm_x300_rtc_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) static inline void cm_x300_init_rtc(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) /* Battery */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) struct power_supply_info cm_x300_psy_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .name = "battery",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) .technology = POWER_SUPPLY_TECHNOLOGY_LIPO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .voltage_max_design = 4200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .voltage_min_design = 3000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) .use_for_apm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) static void cm_x300_battery_low(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) #if defined(CONFIG_APM_EMULATION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) apm_queue_event(APM_LOW_BATTERY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) static void cm_x300_battery_critical(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) #if defined(CONFIG_APM_EMULATION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) apm_queue_event(APM_CRITICAL_SUSPEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) struct da9030_battery_info cm_x300_battery_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) .battery_info = &cm_x300_psy_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) .charge_milliamp = 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .charge_millivolt = 4200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) .vbat_low = 3600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) .vbat_crit = 3400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .vbat_charge_start = 4100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .vbat_charge_stop = 4200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) .vbat_charge_restart = 4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .vcharge_min = 3200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .vcharge_max = 5500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) .tbat_low = 197,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) .tbat_high = 78,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) .tbat_restart = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .batmon_interval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .battery_low = cm_x300_battery_low,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .battery_critical = cm_x300_battery_critical,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) static struct regulator_consumer_supply buck2_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) REGULATOR_SUPPLY("vcc_core", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) static struct regulator_init_data buck2_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .min_uV = 1375000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .max_uV = 1375000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .state_mem = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .enabled = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .apply_uV = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .num_consumer_supplies = ARRAY_SIZE(buck2_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .consumer_supplies = buck2_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) /* DA9030 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) struct da903x_subdev_info cm_x300_da9030_subdevs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) .name = "da903x-battery",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .id = DA9030_ID_BAT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .platform_data = &cm_x300_battery_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) .name = "da903x-regulator",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) .id = DA9030_ID_BUCK2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) .platform_data = &buck2_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) static struct da903x_platform_data cm_x300_da9030_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) .num_subdevs = ARRAY_SIZE(cm_x300_da9030_subdevs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) .subdevs = cm_x300_da9030_subdevs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static struct i2c_board_info cm_x300_pmic_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) I2C_BOARD_INFO("da9030", 0x49),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .irq = IRQ_WAKEUP0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) .platform_data = &cm_x300_da9030_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) static struct i2c_pxa_platform_data cm_x300_pwr_i2c_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .use_pio = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) static void __init cm_x300_init_da9030(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) i2c_register_board_info(1, &cm_x300_pmic_info, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) irq_set_irq_wake(IRQ_WAKEUP0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) /* wi2wi gpio setting for system_rev >= 130 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) static struct gpio cm_x300_wi2wi_gpios[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) { 71, GPIOF_OUT_INIT_HIGH, "wlan en" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) { 70, GPIOF_OUT_INIT_HIGH, "bt reset" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static void __init cm_x300_init_wi2wi(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (system_rev < 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) cm_x300_wi2wi_gpios[0].gpio = 77; /* wlan en */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) cm_x300_wi2wi_gpios[1].gpio = 78; /* bt reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) /* Libertas and CSR reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) err = gpio_request_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) pr_err("failed to request wifi/bt gpios: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /* MFP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) static void __init cm_x300_init_mfp(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /* board-processor specific GPIO initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_mfp_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (system_rev < 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_lt130_mfp_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_ge130_mfp_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) if (cpu_is_pxa310())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x310_mfp_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) static void __init cm_x300_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) cm_x300_init_mfp();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) pxa_set_btuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) pxa_set_stuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) if (cpu_is_pxa300())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) pxa_set_ffuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) cm_x300_init_da9030();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) cm_x300_init_dm9000();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) cm_x300_init_lcd();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) cm_x300_init_u2d();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) cm_x300_init_ohci();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) cm_x300_init_mmc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) cm_x300_init_nand();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) cm_x300_init_leds();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) cm_x300_init_i2c();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) cm_x300_init_spi();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) cm_x300_init_rtc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) cm_x300_init_ac97();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) cm_x300_init_wi2wi();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) cm_x300_init_bl();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) regulator_has_full_constraints();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) static void __init cm_x300_fixup(struct tag *tags, char **cmdline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) /* Make sure that mi->bank[0].start = PHYS_ADDR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) for (; tags->hdr.size; tags = tag_next(tags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) if (tags->hdr.tag == ATAG_MEM &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) tags->u.mem.start == 0x80000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) tags->u.mem.start = 0xa0000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) MACHINE_START(CM_X300, "CM-X300 module")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .map_io = pxa3xx_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) .nr_irqs = PXA_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .init_irq = pxa3xx_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) .handle_irq = pxa3xx_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) .init_time = pxa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) .init_machine = cm_x300_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) .fixup = cm_x300_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) .restart = pxa_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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