^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-pxa/balloon3.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Support for Balloonboard.org Balloon3 board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Nick Bane, Wookey, Jonathan McDowell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Created: June, 2006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright: Toby Churchill Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Derived from mainstone.c, by Nico Pitre
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/ucb1400.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/platform_data/pcf857x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/platform_data/i2c-pxa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mtd/platnand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/regulator/max1586.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include "pxa27x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <mach/balloon3.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <mach/audio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/platform_data/video-pxafb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/platform_data/mmc-pxamci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include "udc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include "pxa27x-udc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/platform_data/irda-pxaficp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/platform_data/usb-ohci-pxa27x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Pin configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static unsigned long balloon3_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Select BTUART 'COM1/ttyS0' as IO option for pins 42/43/44/45 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) GPIO42_BTUART_RXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) GPIO43_BTUART_TXD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) GPIO44_BTUART_CTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) GPIO45_BTUART_RTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Reset, configured as GPIO wakeup source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Compatibility: Parameter parsing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static unsigned long balloon3_irq_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static unsigned long balloon3_features_present =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) (1 << BALLOON3_FEATURE_OHCI) | (1 << BALLOON3_FEATURE_CF) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) (1 << BALLOON3_FEATURE_AUDIO) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) (1 << BALLOON3_FEATURE_TOPPOLY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int balloon3_has(enum balloon3_features feature)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return (balloon3_features_present & (1 << feature)) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) EXPORT_SYMBOL_GPL(balloon3_has);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int __init parse_balloon3_features(char *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (!arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return kstrtoul(arg, 0, &balloon3_features_present);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) early_param("balloon3_features", parse_balloon3_features);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * Compact Flash slot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #if defined(CONFIG_PCMCIA_PXA2XX) || defined(CONFIG_PCMCIA_PXA2XX_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static unsigned long balloon3_cf_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) GPIO48_nPOE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) GPIO49_nPWE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) GPIO50_nPIOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) GPIO51_nPIOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) GPIO85_nPCE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) GPIO54_nPCE_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) GPIO79_PSKTSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) GPIO55_nPREG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) GPIO56_nPWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) GPIO57_nIOIS16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void __init balloon3_cf_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (!balloon3_has(BALLOON3_FEATURE_CF))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_cf_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static inline void balloon3_cf_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * NOR Flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static struct mtd_partition balloon3_nor_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .name = "Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .offset = 0x00000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static struct physmap_flash_data balloon3_flash_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .width = 2, /* bankwidth in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .parts = balloon3_nor_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .nr_parts = ARRAY_SIZE(balloon3_nor_partitions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static struct resource balloon3_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .start = PXA_CS0_PHYS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .end = PXA_CS0_PHYS + SZ_64M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static struct platform_device balloon3_flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .resource = &balloon3_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .platform_data = balloon3_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static void __init balloon3_nor_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) platform_device_register(&balloon3_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static inline void balloon3_nor_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * Audio and Touchscreen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #if defined(CONFIG_TOUCHSCREEN_UCB1400) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static unsigned long balloon3_ac97_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) GPIO28_AC97_BITCLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) GPIO29_AC97_SDATA_IN_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) GPIO30_AC97_SDATA_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) GPIO31_AC97_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) GPIO113_AC97_nRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) GPIO95_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static struct ucb1400_pdata vpac270_ucb1400_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .irq = PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static struct platform_device balloon3_ucb1400_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .name = "ucb1400_core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .platform_data = &vpac270_ucb1400_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static void __init balloon3_ts_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (!balloon3_has(BALLOON3_FEATURE_AUDIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_ac97_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) pxa_set_ac97_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) platform_device_register(&balloon3_ucb1400_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static inline void balloon3_ts_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * Framebuffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static unsigned long balloon3_lcd_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) GPIOxx_LCD_TFT_16BPP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) GPIO99_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static struct pxafb_mode_info balloon3_lcd_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .pixclock = 38000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .xres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .yres = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .bpp = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .hsync_len = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .left_margin = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .right_margin = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .vsync_len = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .upper_margin = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .lower_margin = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .sync = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static struct pxafb_mach_info balloon3_lcd_screen = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .modes = balloon3_lcd_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .num_modes = ARRAY_SIZE(balloon3_lcd_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static void balloon3_backlight_power(int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static void __init balloon3_lcd_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (!balloon3_has(BALLOON3_FEATURE_TOPPOLY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_lcd_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ret = gpio_request(BALLOON3_GPIO_RUN_BACKLIGHT, "BKL-ON");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) pr_err("Requesting BKL-ON GPIO failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ret = gpio_direction_output(BALLOON3_GPIO_RUN_BACKLIGHT, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) pr_err("Setting BKL-ON GPIO direction failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) pxa_set_fb_info(NULL, &balloon3_lcd_screen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) err2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) gpio_free(BALLOON3_GPIO_RUN_BACKLIGHT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) static inline void balloon3_lcd_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * SD/MMC card controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static unsigned long balloon3_mmc_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) GPIO32_MMC_CLK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) GPIO92_MMC_DAT_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) GPIO109_MMC_DAT_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) GPIO110_MMC_DAT_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) GPIO111_MMC_DAT_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) GPIO112_MMC_CMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static struct pxamci_platform_data balloon3_mci_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) .detect_delay_ms = 200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static void __init balloon3_mmc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_mmc_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) pxa_set_mci_info(&balloon3_mci_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static inline void balloon3_mmc_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * USB Gadget
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #if defined(CONFIG_USB_PXA27X)||defined(CONFIG_USB_PXA27X_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static void balloon3_udc_command(int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (cmd == PXA2XX_UDC_CMD_CONNECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) UP2OCR |= UP2OCR_DPPUE | UP2OCR_DPPUBE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) else if (cmd == PXA2XX_UDC_CMD_DISCONNECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) UP2OCR &= ~UP2OCR_DPPUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static int balloon3_udc_is_connected(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static struct pxa2xx_udc_mach_info balloon3_udc_info __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .udc_command = balloon3_udc_command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .udc_is_connected = balloon3_udc_is_connected,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .gpio_pullup = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static void __init balloon3_udc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) pxa_set_udc_info(&balloon3_udc_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static inline void balloon3_udc_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * IrDA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #if defined(CONFIG_IRDA) || defined(CONFIG_IRDA_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static struct pxaficp_platform_data balloon3_ficp_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .transceiver_cap = IR_FIRMODE | IR_SIRMODE | IR_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static void __init balloon3_irda_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) pxa_set_ficp_info(&balloon3_ficp_platform_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static inline void balloon3_irda_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) * USB Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static unsigned long balloon3_uhc_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) GPIO88_USBH1_PWR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) GPIO89_USBH1_PEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static struct pxaohci_platform_data balloon3_ohci_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .port_mode = PMM_PERPORT_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static void __init balloon3_uhc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (!balloon3_has(BALLOON3_FEATURE_OHCI))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_uhc_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) pxa_set_ohci_info(&balloon3_ohci_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static inline void balloon3_uhc_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * LEDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static unsigned long balloon3_led_pin_config[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) GPIO9_GPIO, /* NAND activity LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) GPIO10_GPIO, /* Heartbeat LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct gpio_led balloon3_gpio_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .name = "balloon3:green:idle",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .default_trigger = "heartbeat",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .gpio = BALLOON3_GPIO_LED_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .name = "balloon3:green:nand",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .default_trigger = "nand-disk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .gpio = BALLOON3_GPIO_LED_NAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static struct gpio_led_platform_data balloon3_gpio_led_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .leds = balloon3_gpio_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .num_leds = ARRAY_SIZE(balloon3_gpio_leds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static struct platform_device balloon3_leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .platform_data = &balloon3_gpio_led_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct gpio_led balloon3_pcf_gpio_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .name = "balloon3:green:led0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .gpio = BALLOON3_PCF_GPIO_LED0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .name = "balloon3:green:led1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .gpio = BALLOON3_PCF_GPIO_LED1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .name = "balloon3:orange:led2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .gpio = BALLOON3_PCF_GPIO_LED2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .name = "balloon3:orange:led3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .gpio = BALLOON3_PCF_GPIO_LED3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .name = "balloon3:orange:led4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .gpio = BALLOON3_PCF_GPIO_LED4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .name = "balloon3:orange:led5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .gpio = BALLOON3_PCF_GPIO_LED5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .name = "balloon3:red:led6",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .gpio = BALLOON3_PCF_GPIO_LED6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .name = "balloon3:red:led7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .gpio = BALLOON3_PCF_GPIO_LED7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static struct gpio_led_platform_data balloon3_pcf_gpio_led_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .leds = balloon3_pcf_gpio_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .num_leds = ARRAY_SIZE(balloon3_pcf_gpio_leds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static struct platform_device balloon3_pcf_leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .platform_data = &balloon3_pcf_gpio_led_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static void __init balloon3_leds_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_led_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) platform_device_register(&balloon3_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) platform_device_register(&balloon3_pcf_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static inline void balloon3_leds_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * FPGA IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static void balloon3_mask_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) balloon3_irq_enabled &= ~(1 << balloon3_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static void balloon3_unmask_irq(struct irq_data *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) int balloon3_irq = (d->irq - BALLOON3_IRQ(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) balloon3_irq_enabled |= (1 << balloon3_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static struct irq_chip balloon3_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .name = "FPGA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .irq_ack = balloon3_mask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) .irq_mask = balloon3_mask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .irq_unmask = balloon3_unmask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static void balloon3_irq_handler(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) unsigned long pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) balloon3_irq_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) struct irq_data *d = irq_desc_get_irq_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) /* clear useless edge notification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (chip->irq_ack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) chip->irq_ack(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) while (pending) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) irq = BALLOON3_IRQ(0) + __ffs(pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) generic_handle_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) pending &= pending - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) pending = __raw_readl(BALLOON3_INT_CONTROL_REG) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) balloon3_irq_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) } while (pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static void __init balloon3_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) pxa27x_init_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* setup extra Balloon3 irqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) irq_set_chip_and_handler(irq, &balloon3_irq_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) handle_level_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) pr_debug("%s: chained handler installed - irq %d automatically "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) "enabled\n", __func__, BALLOON3_AUX_NIRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * GPIO expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) #if defined(CONFIG_GPIO_PCF857X) || defined(CONFIG_GPIO_PCF857X_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static struct pcf857x_platform_data balloon3_pcf857x_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) .gpio_base = BALLOON3_PCF_GPIO_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .n_latch = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .setup = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .teardown = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .context = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static struct i2c_board_info __initdata balloon3_i2c_devs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) I2C_BOARD_INFO("pcf8574a", 0x38),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) .platform_data = &balloon3_pcf857x_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) static void __init balloon3_i2c_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) pxa_set_i2c_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) i2c_register_board_info(0, ARRAY_AND_SIZE(balloon3_i2c_devs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) static inline void balloon3_i2c_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * NAND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) #if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) static void balloon3_nand_cmd_ctl(struct nand_chip *this, int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) unsigned int ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) uint8_t balloon3_ctl_set = 0, balloon3_ctl_clr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (ctrl & NAND_CTRL_CHANGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (ctrl & NAND_CLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLCLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLCLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (ctrl & NAND_ALE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) balloon3_ctl_set |= BALLOON3_NAND_CONTROL_FLALE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) balloon3_ctl_clr |= BALLOON3_NAND_CONTROL_FLALE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (balloon3_ctl_clr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) __raw_writel(balloon3_ctl_clr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) BALLOON3_NAND_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (balloon3_ctl_set)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) __raw_writel(balloon3_ctl_set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) BALLOON3_NAND_CONTROL_REG +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) BALLOON3_FPGA_SETnCLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) if (cmd != NAND_CMD_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) writeb(cmd, this->legacy.IO_ADDR_W);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) static void balloon3_nand_select_chip(struct nand_chip *this, int chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (chip < 0 || chip > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /* Assert all nCE lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) __raw_writew(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) /* Deassert correct nCE line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) __raw_writew(BALLOON3_NAND_CONTROL_FLCE0 << chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) BALLOON3_NAND_CONTROL_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) static int balloon3_nand_dev_ready(struct nand_chip *this)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static int balloon3_nand_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) uint16_t ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) __raw_writew(BALLOON3_NAND_CONTROL2_16BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) BALLOON3_NAND_CONTROL2_REG + BALLOON3_FPGA_SETnCLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) ver = __raw_readw(BALLOON3_FPGA_VER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (ver < 0x4f08)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) pr_warn("The FPGA code, version 0x%04x, is too old. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) "NAND support might be broken in this version!", ver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) /* Power up the NAND chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) ret = gpio_request(BALLOON3_GPIO_RUN_NAND, "NAND");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) goto err1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) ret = gpio_direction_output(BALLOON3_GPIO_RUN_NAND, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) goto err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) gpio_set_value(BALLOON3_GPIO_RUN_NAND, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) /* Deassert all nCE lines and write protect line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) __raw_writel(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) BALLOON3_NAND_CONTROL_FLCE0 | BALLOON3_NAND_CONTROL_FLCE1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) BALLOON3_NAND_CONTROL_FLCE2 | BALLOON3_NAND_CONTROL_FLCE3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) BALLOON3_NAND_CONTROL_FLWP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) BALLOON3_NAND_CONTROL_REG + BALLOON3_FPGA_SETnCLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) err2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) gpio_free(BALLOON3_GPIO_RUN_NAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) err1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static void balloon3_nand_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) /* Power down the NAND chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) gpio_set_value(BALLOON3_GPIO_RUN_NAND, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) gpio_free(BALLOON3_GPIO_RUN_NAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) static struct mtd_partition balloon3_partition_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) .name = "Boot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .size = SZ_4M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) .name = "RootFS",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .size = MTDPART_SIZ_FULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) struct platform_nand_data balloon3_nand_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .nr_chips = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .chip_offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .nr_partitions = ARRAY_SIZE(balloon3_partition_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .partitions = balloon3_partition_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) .chip_delay = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .ctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .dev_ready = balloon3_nand_dev_ready,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .select_chip = balloon3_nand_select_chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .cmd_ctrl = balloon3_nand_cmd_ctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .probe = balloon3_nand_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .remove = balloon3_nand_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) static struct resource balloon3_nand_resource[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) .start = BALLOON3_NAND_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) .end = BALLOON3_NAND_BASE + 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static struct platform_device balloon3_nand = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) .name = "gen_nand",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) .num_resources = ARRAY_SIZE(balloon3_nand_resource),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) .resource = balloon3_nand_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) .platform_data = &balloon3_nand_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) static void __init balloon3_nand_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) platform_device_register(&balloon3_nand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) static inline void balloon3_nand_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) * Core power regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) #if defined(CONFIG_REGULATOR_MAX1586) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) defined(CONFIG_REGULATOR_MAX1586_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static struct regulator_consumer_supply balloon3_max1587a_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) REGULATOR_SUPPLY("vcc_core", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static struct regulator_init_data balloon3_max1587a_v3_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .name = "vcc_core range",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .min_uV = 900000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .max_uV = 1705000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) .always_on = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .consumer_supplies = balloon3_max1587a_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .num_consumer_supplies = ARRAY_SIZE(balloon3_max1587a_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static struct max1586_subdev_data balloon3_max1587a_subdevs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .name = "vcc_core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .id = MAX1586_V3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .platform_data = &balloon3_max1587a_v3_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) static struct max1586_platform_data balloon3_max1587a_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .subdevs = balloon3_max1587a_subdevs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .num_subdevs = ARRAY_SIZE(balloon3_max1587a_subdevs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) .v3_gain = MAX1586_GAIN_R24_3k32, /* 730..1550 mV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) static struct i2c_board_info __initdata balloon3_pi2c_board_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) I2C_BOARD_INFO("max1586", 0x14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .platform_data = &balloon3_max1587a_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static void __init balloon3_pmic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) pxa27x_set_i2c_power_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) i2c_register_board_info(1, ARRAY_AND_SIZE(balloon3_pi2c_board_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) static inline void balloon3_pmic_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) * Machine init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) static void __init balloon3_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) ARB_CNTRL = ARB_CORE_PARK | 0x234;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) pxa_set_ffuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) pxa_set_btuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) pxa_set_stuart_info(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) balloon3_i2c_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) balloon3_irda_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) balloon3_lcd_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) balloon3_leds_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) balloon3_mmc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) balloon3_nand_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) balloon3_nor_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) balloon3_pmic_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) balloon3_ts_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) balloon3_udc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) balloon3_uhc_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) balloon3_cf_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static struct map_desc balloon3_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) { /* CPLD/FPGA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .virtual = (unsigned long)BALLOON3_FPGA_VIRT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) .pfn = __phys_to_pfn(BALLOON3_FPGA_PHYS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) .length = BALLOON3_FPGA_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .type = MT_DEVICE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) static void __init balloon3_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) pxa27x_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) MACHINE_START(BALLOON3, "Balloon3")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) /* Maintainer: Nick Bane. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) .map_io = balloon3_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) .nr_irqs = BALLOON3_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) .init_irq = balloon3_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) .handle_irq = pxa27x_handle_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .init_time = pxa_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .init_machine = balloon3_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) .restart = pxa_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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