Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Entry of the second core for CSR Marco dual-core SMP SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * SIRFSOC specific entry point for secondary CPUs.  This provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * a "holding pen" into which all secondary cores are held until we're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * ready for them to initialise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) ENTRY(sirfsoc_secondary_startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)         mrc     p15, 0, r0, c0, c0, 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)         and     r0, r0, #15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)         adr     r4, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)         ldmia   r4, {r5, r6}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)         sub     r4, r4, r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)         add     r6, r6, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) pen:    ldr     r7, [r6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)         cmp     r7, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)         bne     pen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)         /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)          * we've been released from the holding pen: secondary_stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)          * should now contain the SVC stack for this core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)          */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)         b       secondary_startup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ENDPROC(sirfsoc_secondary_startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)         .align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 1:      .long   .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)         .long   prima2_pen_release