^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) menuconfig ARCH_SIRF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) bool "CSR SiRF"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) depends on ARCH_MULTI_V7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) select ARCH_HAS_RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) select RESET_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) select GENERIC_IRQ_CHIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) select GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) select NO_IOPORT_MAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) select REGMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) select PINCTRL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) select PINCTRL_SIRF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Support for CSR SiRFprimaII/Marco/Polo platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) if ARCH_SIRF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) config ARCH_ATLAS6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) select SIRF_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Support for CSR SiRFSoC ARM Cortex A9 Platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) config ARCH_ATLAS7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) select ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) select ATLAS7_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) select HAVE_ARM_SCU if SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Support for CSR SiRFSoC ARM Cortex A7 Platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) config ARCH_PRIMA2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) select SIRF_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) select ZONE_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) select PRIMA2_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Support for CSR SiRFSoC ARM Cortex A9 Platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) config SIRF_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) endif