^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2002 ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/cp15.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/smp_plat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/smp_scu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) extern void ox820_secondary_startup(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static void __iomem *cpu_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static void __iomem *gic_cpu_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define HOLDINGPEN_CPU_OFFSET 0xc8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define HOLDINGPEN_LOCATION_OFFSET 0xc4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define GIC_NCPU_OFFSET(cpu) (0x100 + (cpu)*0x100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define GIC_CPU_CTRL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define GIC_CPU_CTRL_ENABLE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static int __init ox820_boot_secondary(unsigned int cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct task_struct *idle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Write the address of secondary startup into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * system-wide flags register. The BootMonitor waits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * until it receives a soft interrupt, and then the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * secondary CPU branches to this address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) writel(virt_to_phys(ox820_secondary_startup),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) cpu_ctrl + HOLDINGPEN_LOCATION_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) writel(cpu, cpu_ctrl + HOLDINGPEN_CPU_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * Enable GIC cpu interface in CPU Interface Control Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) writel(GIC_CPU_CTRL_ENABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) gic_cpu_ctrl + GIC_NCPU_OFFSET(cpu) + GIC_CPU_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * Send the secondary CPU a soft interrupt, thereby causing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * the boot monitor to read the system wide flags register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * and branch to the address found there.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) arch_send_wakeup_ipi_mask(cpumask_of(cpu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void __init ox820_smp_prepare_cpus(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) void __iomem *scu_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-scu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) scu_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (!scu_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* Remap CPU Interrupt Interface Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) np = of_find_compatible_node(NULL, NULL, "arm,arm11mp-gic");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) gic_cpu_ctrl = of_iomap(np, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (!gic_cpu_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) goto unmap_scu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) np = of_find_compatible_node(NULL, NULL, "oxsemi,ox820-sys-ctrl");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) cpu_ctrl = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (!cpu_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) goto unmap_scu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) scu_enable(scu_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) flush_cache_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unmap_scu:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) iounmap(scu_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static const struct smp_operations ox820_smp_ops __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .smp_prepare_cpus = ox820_smp_prepare_cpus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .smp_boot_secondary = ox820_boot_secondary,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) CPU_METHOD_OF_DECLARE(ox820_smp, "oxsemi,ox820-smp", &ox820_smp_ops);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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