Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #define TS7800_FPGA_MAGIC 0x00b480
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define FPGAID(_magic, _rev) ((_magic << 8) + _rev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * get yer id's from http://ts78xx.digriz.org.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * do *not* make up your own or 'borrow' any!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) enum fpga_ids {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	/* Technologic Systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	TS7800_REV_1	= FPGAID(TS7800_FPGA_MAGIC, 0x01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	TS7800_REV_2	= FPGAID(TS7800_FPGA_MAGIC, 0x02),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	TS7800_REV_3	= FPGAID(TS7800_FPGA_MAGIC, 0x03),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	TS7800_REV_4	= FPGAID(TS7800_FPGA_MAGIC, 0x04),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	TS7800_REV_5	= FPGAID(TS7800_FPGA_MAGIC, 0x05),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	TS7800_REV_6	= FPGAID(TS7800_FPGA_MAGIC, 0x06),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	TS7800_REV_7	= FPGAID(TS7800_FPGA_MAGIC, 0x07),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	TS7800_REV_8	= FPGAID(TS7800_FPGA_MAGIC, 0x08),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	TS7800_REV_9	= FPGAID(TS7800_FPGA_MAGIC, 0x09),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	/* Unaffordable & Expensive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	UAE_DUMMY	= FPGAID(0xffffff, 0x01),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct fpga_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	unsigned		present:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	unsigned		init:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct fpga_devices {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	/* Technologic Systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	struct fpga_device	ts_rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	struct fpga_device	ts_nand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	struct fpga_device	ts_rng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct ts78xx_fpga_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	unsigned int		id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	int			state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	struct fpga_devices	supports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };