^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Marvell Orion-VoIP GE Reference Design Setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mv643xx_eth.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_data/dsa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "mpp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "orion5x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * RD-88F5181L GE Info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * 16M NOR flash Device bus boot chip select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RD88F5181L_GE_NOR_BOOT_BASE 0xff000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RD88F5181L_GE_NOR_BOOT_SIZE SZ_16M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * 16M NOR Flash on Device bus Boot chip select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .width = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .start = RD88F5181L_GE_NOR_BOOT_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .end = RD88F5181L_GE_NOR_BOOT_BASE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) RD88F5181L_GE_NOR_BOOT_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static struct platform_device rd88f5181l_ge_nor_boot_flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .platform_data = &rd88f5181l_ge_nor_boot_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .resource = &rd88f5181l_ge_nor_boot_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * General Setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MPP0_GPIO, /* LED1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MPP1_GPIO, /* LED5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MPP2_GPIO, /* LED4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MPP3_GPIO, /* LED3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MPP4_GPIO, /* PCI_intA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MPP5_GPIO, /* RTC interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MPP6_PCI_CLK, /* CPU PCI refclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MPP7_PCI_CLK, /* PCI/PCIe refclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MPP8_GPIO, /* 88e6131 interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MPP9_GPIO, /* GE_RXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MPP10_GPIO, /* PCI_intB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MPP11_GPIO, /* LED2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MPP12_GIGE, /* GE_TXD[4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MPP13_GIGE, /* GE_TXD[5] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MPP14_GIGE, /* GE_TXD[6] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MPP15_GIGE, /* GE_TXD[7] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MPP16_GIGE, /* GE_RXD[4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MPP17_GIGE, /* GE_RXD[5] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MPP18_GIGE, /* GE_RXD[6] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MPP19_GIGE, /* GE_RXD[7] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .phy_addr = MV643XX_ETH_PHY_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .speed = SPEED_1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .duplex = DUPLEX_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .port_names[0] = "lan2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .port_names[1] = "lan1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .port_names[2] = "wan",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .port_names[3] = "cpu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .port_names[5] = "lan4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .port_names[7] = "lan3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) I2C_BOARD_INFO("ds1338", 0x68),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static void __init rd88f5181l_ge_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * Setup basic Orion functions. Need to be called early.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) orion5x_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * Configure peripherals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) orion5x_ehci0_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) orion5x_eth_init(&rd88f5181l_ge_eth_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) orion5x_eth_switch_init(&rd88f5181l_ge_switch_chip_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) orion5x_i2c_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) orion5x_uart0_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ORION_MBUS_DEVBUS_BOOT_ATTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) RD88F5181L_GE_NOR_BOOT_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) RD88F5181L_GE_NOR_BOOT_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) platform_device_register(&rd88f5181l_ge_nor_boot_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * Check for devices with hard-wired IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) irq = orion5x_pci_map_irq(dev, slot, pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (irq != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * Cardbus slot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (pin == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return gpio_to_irq(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return gpio_to_irq(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static struct hw_pci rd88f5181l_ge_pci __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .nr_controllers = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .setup = orion5x_pci_sys_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .scan = orion5x_pci_sys_scan_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .map_irq = rd88f5181l_ge_pci_map_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static int __init rd88f5181l_ge_pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (machine_is_rd88f5181l_ge()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) orion5x_pci_set_cardbus_mode();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) pci_common_init(&rd88f5181l_ge_pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) subsys_initcall(rd88f5181l_ge_pci_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .nr_irqs = ORION5X_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .init_machine = rd88f5181l_ge_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .map_io = orion5x_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .init_early = orion5x_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) .init_irq = orion5x_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .init_time = orion5x_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .fixup = tag_fixup_mem32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .restart = orion5x_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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