^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Marvell Orion-VoIP FXO Reference Design Setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mv643xx_eth.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/platform_data/dsa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "mpp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "orion5x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * RD-88F5181L FXO Info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * 8M NOR flash Device bus boot chip select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * 8M NOR Flash on Device bus Boot chip select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .width = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .start = RD88F5181L_FXO_NOR_BOOT_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .end = RD88F5181L_FXO_NOR_BOOT_BASE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .resource = &rd88f5181l_fxo_nor_boot_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * General Setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) MPP0_GPIO, /* LED1 CardBus LED (front panel) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) MPP1_GPIO, /* PCI_intA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) MPP2_GPIO, /* Hard Reset / Factory Init*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MPP3_GPIO, /* FXS or DAA select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MPP4_GPIO, /* LED6 - phone LED (front panel) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MPP5_GPIO, /* LED5 - phone LED (front panel) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) MPP6_PCI_CLK, /* CPU PCI refclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MPP7_PCI_CLK, /* PCI/PCIe refclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) MPP8_GPIO, /* CardBus reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MPP9_GPIO, /* GE_RXERR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MPP10_GPIO, /* LED2 MiniPCI LED (front panel) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MPP11_GPIO, /* Lifeline control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MPP12_GIGE, /* GE_TXD[4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MPP13_GIGE, /* GE_TXD[5] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MPP14_GIGE, /* GE_TXD[6] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MPP15_GIGE, /* GE_TXD[7] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MPP16_GIGE, /* GE_RXD[4] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MPP17_GIGE, /* GE_RXD[5] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MPP18_GIGE, /* GE_RXD[6] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MPP19_GIGE, /* GE_RXD[7] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .phy_addr = MV643XX_ETH_PHY_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .speed = SPEED_1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .duplex = DUPLEX_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .port_names[0] = "lan2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .port_names[1] = "lan1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .port_names[2] = "wan",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .port_names[3] = "cpu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .port_names[5] = "lan4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .port_names[7] = "lan3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static void __init rd88f5181l_fxo_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * Setup basic Orion functions. Need to be called early.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) orion5x_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * Configure peripherals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) orion5x_ehci0_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) orion5x_eth_init(&rd88f5181l_fxo_eth_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) orion5x_eth_switch_init(&rd88f5181l_fxo_switch_chip_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) orion5x_uart0_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ORION_MBUS_DEVBUS_BOOT_ATTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) RD88F5181L_FXO_NOR_BOOT_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) RD88F5181L_FXO_NOR_BOOT_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static int __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * Check for devices with hard-wired IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) irq = orion5x_pci_map_irq(dev, slot, pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (irq != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * Mini-PCI / Cardbus slot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return gpio_to_irq(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static struct hw_pci rd88f5181l_fxo_pci __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .nr_controllers = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .setup = orion5x_pci_sys_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .scan = orion5x_pci_sys_scan_bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .map_irq = rd88f5181l_fxo_pci_map_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int __init rd88f5181l_fxo_pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (machine_is_rd88f5181l_fxo()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) orion5x_pci_set_cardbus_mode();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) pci_common_init(&rd88f5181l_fxo_pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) subsys_initcall(rd88f5181l_fxo_pci_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* Maintainer: Nicolas Pitre <nico@marvell.com> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .nr_irqs = ORION5X_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .init_machine = rd88f5181l_fxo_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .map_io = orion5x_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .init_early = orion5x_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .init_irq = orion5x_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .init_time = orion5x_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .fixup = tag_fixup_mem32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .restart = orion5x_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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