Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * IRQ definitions for Orion SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *  Maintainer: Tzachi Perelstein <tzachi@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *  This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *  License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *  warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __ASM_ARCH_IRQS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __ASM_ARCH_IRQS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * Orion Main Interrupt Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define IRQ_ORION5X_BRIDGE		(1 + 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define IRQ_ORION5X_DOORBELL_H2C	(1 + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define IRQ_ORION5X_DOORBELL_C2H	(1 + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define IRQ_ORION5X_UART0		(1 + 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define IRQ_ORION5X_UART1		(1 + 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define IRQ_ORION5X_I2C			(1 + 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define IRQ_ORION5X_GPIO_0_7		(1 + 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define IRQ_ORION5X_GPIO_8_15		(1 + 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define IRQ_ORION5X_GPIO_16_23		(1 + 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define IRQ_ORION5X_GPIO_24_31		(1 + 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define IRQ_ORION5X_PCIE0_ERR		(1 + 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define IRQ_ORION5X_PCIE0_INT		(1 + 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define IRQ_ORION5X_USB1_CTRL		(1 + 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define IRQ_ORION5X_DEV_BUS_ERR		(1 + 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define IRQ_ORION5X_PCI_ERR		(1 + 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define IRQ_ORION5X_USB_BR_ERR		(1 + 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define IRQ_ORION5X_USB0_CTRL		(1 + 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define IRQ_ORION5X_ETH_RX		(1 + 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define IRQ_ORION5X_ETH_TX		(1 + 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define IRQ_ORION5X_ETH_MISC		(1 + 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define IRQ_ORION5X_ETH_SUM		(1 + 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define IRQ_ORION5X_ETH_ERR		(1 + 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define IRQ_ORION5X_IDMA_ERR		(1 + 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define IRQ_ORION5X_IDMA_0		(1 + 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define IRQ_ORION5X_IDMA_1		(1 + 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define IRQ_ORION5X_IDMA_2		(1 + 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define IRQ_ORION5X_IDMA_3		(1 + 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define IRQ_ORION5X_CESA		(1 + 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define IRQ_ORION5X_SATA		(1 + 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define IRQ_ORION5X_XOR0		(1 + 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define IRQ_ORION5X_XOR1		(1 + 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)  * Orion General Purpose Pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define IRQ_ORION5X_GPIO_START	33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define NR_GPIO_IRQS		32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define ORION5X_NR_IRQS		(IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif