^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/arm/mach-orion5x/irq.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Core IRQ functions for Marvell Orion System On Chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <plat/orion-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <plat/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/exception.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "bridge-regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int __initdata gpio0_irqs[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) IRQ_ORION5X_GPIO_0_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) IRQ_ORION5X_GPIO_8_15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) IRQ_ORION5X_GPIO_16_23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) IRQ_ORION5X_GPIO_24_31,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static asmlinkage void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u32 stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) stat = readl_relaxed(MAIN_IRQ_CAUSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) stat &= readl_relaxed(MAIN_IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (stat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned int hwirq = 1 + __fls(stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) handle_IRQ(hwirq, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) void __init orion5x_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) orion_irq_init(1, MAIN_IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) set_handle_irq(orion5x_legacy_handle_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * Initialize gpiolib for GPIOs 0-31.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) orion_gpio_init(NULL, 0, 32, GPIO_VIRT_BASE, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) IRQ_ORION5X_GPIO_START, gpio0_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }