Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __ARCH_ORION5X_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __ARCH_ORION5X_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) struct dsa_chip_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) struct mv643xx_eth_platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) struct mv_sata_platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define ORION_MBUS_PCIE_MEM_TARGET    0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define ORION_MBUS_PCIE_MEM_ATTR      0x59
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define ORION_MBUS_PCIE_IO_TARGET     0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define ORION_MBUS_PCIE_IO_ATTR       0x51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define ORION_MBUS_PCIE_WA_TARGET     0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define ORION_MBUS_PCIE_WA_ATTR       0x79
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define ORION_MBUS_PCI_MEM_TARGET     0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define ORION_MBUS_PCI_MEM_ATTR       0x59
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define ORION_MBUS_PCI_IO_TARGET      0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define ORION_MBUS_PCI_IO_ATTR        0x51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define ORION_MBUS_DEVBUS_BOOT_ATTR   0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define ORION_MBUS_DEVBUS_TARGET(cs)  0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ORION_MBUS_DEVBUS_ATTR(cs)    (~(1 << cs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ORION_MBUS_SRAM_TARGET        0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ORION_MBUS_SRAM_ATTR          0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * Basic Orion init functions used early by machine-setup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void orion5x_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) void orion5x_init_early(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) void orion5x_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void orion5x_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void clk_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) extern int orion5x_tclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern void orion5x_timer_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) void orion5x_setup_wins(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) void orion5x_ehci0_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) void orion5x_ehci1_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) void orion5x_eth_switch_init(struct dsa_chip_data *d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void orion5x_i2c_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void orion5x_spi_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) void orion5x_uart0_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void orion5x_uart1_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) void orion5x_xor_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) void orion5x_restart(enum reboot_mode, const char *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)  * PCIe/PCI functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct pci_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct pci_host_bridge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct pci_sys_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) void orion5x_pcie_id(u32 *dev, u32 *rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) void orion5x_pci_disable(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) void orion5x_pci_set_cardbus_mode(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) extern void __init tag_fixup_mem32(struct tag *, char **);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #ifdef CONFIG_MACH_MSS2_DT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) extern void mss2_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static inline void mss2_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)  * Helpers to access Orion registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)  ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)  * These are not preempt-safe.  Locks, if needed, must be taken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)  * care of by the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define orion5x_setbits(r, mask)	writel(readl(r) | (mask), (r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define orion5x_clrbits(r, mask)	writel(readl(r) & ~(mask), (r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #endif