^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/arm/mach-orion5x/board-d2net.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * LaCie d2Network and Big Disk Network NAS setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/mach/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <plat/orion-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "orion5x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * LaCie d2 Network Info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * GPIO LED's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * The blue front LED is wired to the CPLD and can blink in relation with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * SATA activity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * The following array detail the different LED registers and the combination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * of their possible values:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * led_off | blink_ctrl | SATA active | LED state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * | | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * 1 | x | x | off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * 0 | 0 | 0 | off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * 0 | 1 | 0 | blink (rate 300ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * 0 | x | 1 | on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Notes: The blue and the red front LED's can't be on at the same time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * Red LED have priority.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define D2NET_GPIO_RED_LED 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define D2NET_GPIO_BLUE_LED_OFF 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static struct gpio_led d2net_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .name = "d2net:blue:sata",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .default_trigger = "default-on",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .gpio = D2NET_GPIO_BLUE_LED_OFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .name = "d2net:red:fail",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .gpio = D2NET_GPIO_RED_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static struct gpio_led_platform_data d2net_led_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .num_leds = ARRAY_SIZE(d2net_leds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .leds = d2net_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static struct platform_device d2net_gpio_leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .platform_data = &d2net_led_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void __init d2net_gpio_leds_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Configure register blink_ctrl to allow SATA activity LED blinking. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (err == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) pr_err("d2net: failed to configure blue LED blink GPIO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) platform_device_register(&d2net_gpio_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * General Setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) void __init d2net_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) d2net_gpio_leds_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) pr_notice("d2net: Flash write are not yet supported.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }