^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OMAP3/4 Voltage Processor (VP) structure and macro definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007, 2010 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Rajendra Nayak <rnayak@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Lesly A M <x0080970@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Thara Gopinath <thara@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2008, 2011 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Kalle Jokiniemi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Paul Walmsley
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifndef __ARCH_ARM_MACH_OMAP2_VP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define __ARCH_ARM_MACH_OMAP2_VP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct voltagedomain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* XXX document */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define VP_IDLE_TIMEOUT 200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define VP_TRANXDONE_TIMEOUT 300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * struct omap_vp_ops - per-VP operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * @check_txdone: check for VP transaction done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * @clear_txdone: clear VP transaction done status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct omap_vp_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 (*check_txdone)(u8 vp_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) void (*clear_txdone)(u8 vp_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * struct omap_vp_common - register data common to all VDDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct omap_vp_common {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u32 vpconfig_erroroffset_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u32 vpconfig_errorgain_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 vpconfig_initvoltage_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u8 vpconfig_timeouten;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u8 vpconfig_initvdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u8 vpconfig_forceupdate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u8 vpconfig_vpenable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u8 vstepmin_stepmin_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u8 vstepmin_smpswaittimemin_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u8 vstepmax_stepmax_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u8 vstepmax_smpswaittimemax_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u8 vlimitto_vddmin_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u8 vlimitto_vddmax_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u8 vlimitto_timeout_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 vpvoltage_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) const struct omap_vp_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * struct omap_vp_instance - VP register offsets (per-VDD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * @common: pointer to struct omap_vp_common * for this SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * @id: Unique identifier for VP instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * @enabled: flag to keep track of whether vp is enabled or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * XXX vp_common is probably not needed since it is per-SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct omap_vp_instance {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) const struct omap_vp_common *common;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u8 vpconfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u8 vstepmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) u8 vstepmax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) u8 vlimitto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u8 vstatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u8 voltage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) bool enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) extern struct omap_vp_instance omap3_vp_mpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) extern struct omap_vp_instance omap3_vp_core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) extern struct omap_vp_instance omap4_vp_mpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) extern struct omap_vp_instance omap4_vp_iva;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) extern struct omap_vp_instance omap4_vp_core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) extern struct omap_vp_param omap3_mpu_vp_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) extern struct omap_vp_param omap3_core_vp_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) extern struct omap_vp_param omap4_mpu_vp_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) extern struct omap_vp_param omap4_iva_vp_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) extern struct omap_vp_param omap4_core_vp_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) void omap_vp_init(struct voltagedomain *voltdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void omap_vp_enable(struct voltagedomain *voltdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) void omap_vp_disable(struct voltagedomain *voltdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned long target_volt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int omap_vp_update_errorgain(struct voltagedomain *voltdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned long target_volt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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