Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include "voltage.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include "vp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include "prm-regbits-34xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include "prm-regbits-44xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include "prm44xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	struct omap_vp_instance *vp = voltdm->vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	u32 vpconfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	char vsel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	vsel = voltdm->pmic->uv_to_vsel(volt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	vpconfig = voltdm->read(vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	vpconfig &= ~(vp->common->vpconfig_initvoltage_mask |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 		      vp->common->vpconfig_forceupdate |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 		      vp->common->vpconfig_initvdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	voltdm->write(vpconfig, vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	/* Trigger initVDD value copy to voltage processor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	voltdm->write((vpconfig | vp->common->vpconfig_initvdd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		       vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	/* Clear initVDD copy trigger bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	voltdm->write(vpconfig, vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	return vpconfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* Generic voltage init functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) void __init omap_vp_init(struct voltagedomain *voltdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct omap_vp_instance *vp = voltdm->vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	u32 val, sys_clk_rate, timeout, waittime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	u32 vddmin, vddmax, vstepmin, vstepmax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 		pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	if (!voltdm->read || !voltdm->write) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			__func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	vp->enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	/* Divide to avoid overflow */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	sys_clk_rate = voltdm->sys_clk.rate / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	vddmin = max(voltdm->vp_param->vddmin, voltdm->pmic->vddmin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	vddmax = min(voltdm->vp_param->vddmax, voltdm->pmic->vddmax);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	vddmin = voltdm->pmic->uv_to_vsel(vddmin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	vddmax = voltdm->pmic->uv_to_vsel(vddmax);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	waittime = DIV_ROUND_UP(voltdm->pmic->step_size * sys_clk_rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 				1000 * voltdm->pmic->slew_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	vstepmin = voltdm->pmic->vp_vstepmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	vstepmax = voltdm->pmic->vp_vstepmax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	 * VP_CONFIG: error gain is not set here, it will be updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	 * on each scale, based on OPP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	val = (voltdm->pmic->vp_erroroffset <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	       __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		vp->common->vpconfig_timeouten;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	voltdm->write(val, vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* VSTEPMIN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		(vstepmin <<  vp->common->vstepmin_stepmin_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	voltdm->write(val, vp->vstepmin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	/* VSTEPMAX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	val = (vstepmax << vp->common->vstepmax_stepmax_shift) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		(waittime << vp->common->vstepmax_smpswaittimemax_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	voltdm->write(val, vp->vstepmax);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	/* VLIMITTO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	val = (vddmax << vp->common->vlimitto_vddmax_shift) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		(vddmin << vp->common->vlimitto_vddmin_shift) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		(timeout <<  vp->common->vlimitto_timeout_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	voltdm->write(val, vp->vlimitto);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) int omap_vp_update_errorgain(struct voltagedomain *voltdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			     unsigned long target_volt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	struct omap_volt_data *volt_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	if (!voltdm->vp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	/* Get volt_data corresponding to target_volt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	if (IS_ERR(volt_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	/* Setting vp errorgain based on the voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		    volt_data->vp_errgain <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		    __ffs(voltdm->vp->common->vpconfig_errorgain_mask),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		    voltdm->vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* VP force update method of voltage scaling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			      unsigned long target_volt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct omap_vp_instance *vp = voltdm->vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	u32 vpconfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	u8 target_vsel, current_vsel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	int ret, timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	 * Clear all pending TransactionDone interrupt/status. Typical latency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	 * is <3us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		vp->common->ops->clear_txdone(vp->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		if (!vp->common->ops->check_txdone(vp->id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (timeout >= VP_TRANXDONE_TIMEOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		pr_warn("%s: vdd_%s TRANXDONE timeout exceeded. Voltage change aborted\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			__func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	vpconfig = _vp_set_init_voltage(voltdm, target_volt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	/* Force update of voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	voltdm->write(vpconfig | vp->common->vpconfig_forceupdate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		      voltdm->vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	 * Wait for TransactionDone. Typical latency is <200us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	omap_test_timeout(vp->common->ops->check_txdone(vp->id),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			  VP_TRANXDONE_TIMEOUT, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	if (timeout >= VP_TRANXDONE_TIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		pr_err("%s: vdd_%s TRANXDONE timeout exceeded. TRANXDONE never got set after the voltage update\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		       __func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	 * Disable TransactionDone interrupt , clear all status, clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	 * control registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	timeout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		vp->common->ops->clear_txdone(vp->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		if (!vp->common->ops->check_txdone(vp->id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (timeout >= VP_TRANXDONE_TIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		pr_warn("%s: vdd_%s TRANXDONE timeout exceeded while trying to clear the TRANXDONE status\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			__func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	/* Clear force bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	voltdm->write(vpconfig, vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)  * omap_vp_enable() - API to enable a particular VP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)  * @voltdm:	pointer to the VDD whose VP is to be enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)  * This API enables a particular voltage processor. Needed by the smartreflex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)  * class drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) void omap_vp_enable(struct voltagedomain *voltdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	struct omap_vp_instance *vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	u32 vpconfig, volt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	if (!voltdm || IS_ERR(voltdm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		pr_warn("%s: VDD specified does not exist!\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	vp = voltdm->vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	if (!voltdm->read || !voltdm->write) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 			__func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	/* If VP is already enabled, do nothing. Return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (vp->enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	volt = voltdm_get_voltage(voltdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	if (!volt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		pr_warn("%s: unable to find current voltage for %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			__func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	vpconfig = _vp_set_init_voltage(voltdm, volt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	/* Enable VP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	vpconfig |= vp->common->vpconfig_vpenable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	voltdm->write(vpconfig, vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	vp->enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)  * omap_vp_disable() - API to disable a particular VP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)  * @voltdm:	pointer to the VDD whose VP is to be disabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)  * This API disables a particular voltage processor. Needed by the smartreflex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)  * class drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) void omap_vp_disable(struct voltagedomain *voltdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	struct omap_vp_instance *vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	u32 vpconfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	if (!voltdm || IS_ERR(voltdm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		pr_warn("%s: VDD specified does not exist!\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	vp = voltdm->vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	if (!voltdm->read || !voltdm->write) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 			__func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	/* If VP is already disabled, do nothing. Return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	if (!vp->enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		pr_warn("%s: Trying to disable VP for vdd_%s when it is already disabled\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			__func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	/* Disable VP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	vpconfig = voltdm->read(vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	vpconfig &= ~vp->common->vpconfig_vpenable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	voltdm->write(vpconfig, vp->vpconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	omap_test_timeout((voltdm->read(vp->vstatus)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 			  VP_IDLE_TIMEOUT, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (timeout >= VP_IDLE_TIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		pr_warn("%s: vdd_%s idle timedout\n", __func__, voltdm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	vp->enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }