^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OMAP4 Voltage Controller (VC) data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007, 2010 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Rajendra Nayak <rnayak@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Lesly A M <x0080970@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Thara Gopinath <thara@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2008, 2011 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Kalle Jokiniemi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Paul Walmsley
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "prm44xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "prm-regbits-44xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "voltage.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "vc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * VC data common to 44xx chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static const struct omap_vc_common omap4_vc_common = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .data_shift = OMAP4430_DATA_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .regaddr_shift = OMAP4430_REGADDR_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .valid = OMAP4430_VALID_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .cmd_on_shift = OMAP4430_ON_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .cmd_on_mask = OMAP4430_ON_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .cmd_onlp_shift = OMAP4430_ONLP_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .cmd_ret_shift = OMAP4430_RET_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .cmd_off_shift = OMAP4430_OFF_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .i2c_cfg_clear_mask = OMAP4430_SRMODEEN_MASK | OMAP4430_HSMODEEN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .i2c_mcode_mask = OMAP4430_HSMCODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* VC instance data for each controllable voltage line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct omap_vc_channel omap4_vc_mpu = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .flags = OMAP_VC_CHANNEL_DEFAULT | OMAP_VC_CHANNEL_CFG_MUTANT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .common = &omap4_vc_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct omap_vc_channel omap4_vc_iva = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .common = &omap4_vc_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct omap_vc_channel omap4_vc_core = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .common = &omap4_vc_common,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * Voltage levels for different operating modes: on, sleep, retention and off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define OMAP4_ON_VOLTAGE_UV 1375000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define OMAP4_ONLP_VOLTAGE_UV 1375000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define OMAP4_RET_VOLTAGE_UV 837500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define OMAP4_OFF_VOLTAGE_UV 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct omap_vc_param omap4_mpu_vc_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .on = OMAP4_ON_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .onlp = OMAP4_ONLP_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .ret = OMAP4_RET_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .off = OMAP4_OFF_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct omap_vc_param omap4_iva_vc_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .on = OMAP4_ON_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .onlp = OMAP4_ONLP_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .ret = OMAP4_RET_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .off = OMAP4_OFF_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct omap_vc_param omap4_core_vc_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .on = OMAP4_ON_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .onlp = OMAP4_ONLP_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .ret = OMAP4_RET_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .off = OMAP4_OFF_VOLTAGE_UV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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