^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * OMAP cpu type detection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2004, 2008 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2009-11 Texas Instruments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Written by Tony Lindgren <tony.lindgren@nokia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Added DRA7xxx specific defines - Sricharan R<r.sricharan@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "omap24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "omap34xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "omap44xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "ti81xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "am33xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "omap54xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * OMAP2+ is always defined as ARCH_MULTIPLATFORM in Kconfig
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #undef MULTI_OMAP2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define MULTI_OMAP2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Omap device type i.e. EMU/HS/TST/GP/BAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define OMAP2_DEVICE_TYPE_TEST 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OMAP2_DEVICE_TYPE_EMU 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define OMAP2_DEVICE_TYPE_SEC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define OMAP2_DEVICE_TYPE_GP 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define OMAP2_DEVICE_TYPE_BAD 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int omap_type(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * omap_rev bits:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * SoC id bits (0730, 1510, 1710, 2422...) [31:16]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * SoC revision (See _REV_ defined in cpu.h) [15:08]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * SoC class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned int omap_rev(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static inline int soc_is_omap(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return omap_rev() != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * Get the SoC revision for OMAP devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * Macros to group OMAP into cpu classes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * These can be used in most places.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * soc_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * soc_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * soc_is_omap243x(): True for OMAP2430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * soc_is_omap343x(): True for OMAP3430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * soc_is_omap443x(): True for OMAP4430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * soc_is_omap446x(): True for OMAP4460
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * soc_is_omap447x(): True for OMAP4470
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * soc_is_omap543x(): True for OMAP5430, OMAP5432
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define GET_OMAP_CLASS (omap_rev() & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define IS_OMAP_CLASS(class, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static inline int is_omap ##class (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define IS_AM_CLASS(class, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static inline int is_am ##class (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return (GET_AM_CLASS == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define IS_TI_CLASS(class, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static inline int is_ti ##class (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return (GET_TI_CLASS == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define GET_DRA_CLASS ((omap_rev() >> 24) & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define IS_DRA_CLASS(class, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static inline int is_dra ##class (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return (GET_DRA_CLASS == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define IS_OMAP_SUBCLASS(subclass, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static inline int is_omap ##subclass (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define IS_TI_SUBCLASS(subclass, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static inline int is_ti ##subclass (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define IS_AM_SUBCLASS(subclass, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static inline int is_am ##subclass (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define IS_DRA_SUBCLASS(subclass, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static inline int is_dra ##subclass (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define GET_DRA_PACKAGE (omap_rev() & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define IS_DRA_SUBCLASS_PACKAGE(subclass, package, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static inline int is_dra ##subclass ##_ ##package (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return (is_dra ##subclass () && GET_DRA_PACKAGE == id) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) IS_OMAP_CLASS(24xx, 0x24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) IS_OMAP_CLASS(34xx, 0x34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) IS_OMAP_CLASS(44xx, 0x44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) IS_AM_CLASS(35xx, 0x35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) IS_OMAP_CLASS(54xx, 0x54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) IS_AM_CLASS(33xx, 0x33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) IS_AM_CLASS(43xx, 0x43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) IS_TI_CLASS(81xx, 0x81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) IS_DRA_CLASS(7xx, 0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) IS_OMAP_SUBCLASS(242x, 0x242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) IS_OMAP_SUBCLASS(243x, 0x243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) IS_OMAP_SUBCLASS(343x, 0x343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) IS_OMAP_SUBCLASS(363x, 0x363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) IS_OMAP_SUBCLASS(443x, 0x443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) IS_OMAP_SUBCLASS(446x, 0x446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) IS_OMAP_SUBCLASS(447x, 0x447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) IS_OMAP_SUBCLASS(543x, 0x543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) IS_TI_SUBCLASS(816x, 0x816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) IS_TI_SUBCLASS(814x, 0x814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) IS_AM_SUBCLASS(335x, 0x335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) IS_AM_SUBCLASS(437x, 0x437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) IS_DRA_SUBCLASS(76x, 0x76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) IS_DRA_SUBCLASS_PACKAGE(76x, abz, 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) IS_DRA_SUBCLASS_PACKAGE(76x, acd, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) IS_DRA_SUBCLASS(75x, 0x75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) IS_DRA_SUBCLASS(72x, 0x72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define soc_is_ti81xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define soc_is_ti816x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define soc_is_ti814x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define soc_is_am35xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define soc_is_am33xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define soc_is_am335x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define soc_is_am43xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define soc_is_am437x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define soc_is_omap44xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define soc_is_omap443x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define soc_is_omap446x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define soc_is_omap447x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define soc_is_omap54xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define soc_is_omap543x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define soc_is_dra7xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define soc_is_dra76x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define soc_is_dra74x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define soc_is_dra72x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #if defined(CONFIG_ARCH_OMAP2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) # define soc_is_omap24xx() is_omap24xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) # define soc_is_omap24xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #if defined(CONFIG_SOC_OMAP2420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) # define soc_is_omap242x() is_omap242x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) # define soc_is_omap242x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #if defined(CONFIG_SOC_OMAP2430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) # define soc_is_omap243x() is_omap243x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) # define soc_is_omap243x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #if defined(CONFIG_ARCH_OMAP3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) # define soc_is_omap34xx() is_omap34xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) # define soc_is_omap343x() is_omap343x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) # define soc_is_omap34xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) # define soc_is_omap343x() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * Macros to detect individual cpu types.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * These are only rarely needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * soc_is_omap2420(): True for OMAP2420
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * soc_is_omap2422(): True for OMAP2422
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * soc_is_omap2423(): True for OMAP2423
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * soc_is_omap2430(): True for OMAP2430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * soc_is_omap3430(): True for OMAP3430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define IS_OMAP_TYPE(type, id) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static inline int is_omap ##type (void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) IS_OMAP_TYPE(2420, 0x2420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) IS_OMAP_TYPE(2422, 0x2422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) IS_OMAP_TYPE(2423, 0x2423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) IS_OMAP_TYPE(2430, 0x2430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) IS_OMAP_TYPE(3430, 0x3430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define soc_is_omap2420() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define soc_is_omap2422() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define soc_is_omap2423() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define soc_is_omap2430() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define soc_is_omap3430() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define soc_is_omap3630() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define soc_is_omap5430() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* These are needed for the common code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define soc_is_omap7xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define soc_is_omap15xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define soc_is_omap16xx() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define soc_is_omap1510() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define soc_is_omap1610() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define soc_is_omap1611() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define soc_is_omap1621() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define soc_is_omap1710() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define cpu_class_is_omap1() 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define cpu_class_is_omap2() 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #if defined(CONFIG_ARCH_OMAP2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) # undef soc_is_omap2420
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) # undef soc_is_omap2422
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) # undef soc_is_omap2423
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) # undef soc_is_omap2430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) # define soc_is_omap2420() is_omap2420()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) # define soc_is_omap2422() is_omap2422()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) # define soc_is_omap2423() is_omap2423()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) # define soc_is_omap2430() is_omap2430()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #if defined(CONFIG_ARCH_OMAP3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) # undef soc_is_omap3430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) # undef soc_is_ti81xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) # undef soc_is_ti816x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) # undef soc_is_ti814x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) # undef soc_is_am35xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) # define soc_is_omap3430() is_omap3430()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) # undef soc_is_omap3630
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) # define soc_is_omap3630() is_omap363x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) # define soc_is_ti81xx() is_ti81xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) # define soc_is_ti816x() is_ti816x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) # define soc_is_ti814x() is_ti814x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) # define soc_is_am35xx() is_am35xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) # if defined(CONFIG_SOC_AM33XX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) # undef soc_is_am33xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) # undef soc_is_am335x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) # define soc_is_am33xx() is_am33xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) # define soc_is_am335x() is_am335x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #ifdef CONFIG_SOC_AM43XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) # undef soc_is_am43xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) # undef soc_is_am437x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) # define soc_is_am43xx() is_am43xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) # define soc_is_am437x() is_am437x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) # if defined(CONFIG_ARCH_OMAP4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) # undef soc_is_omap44xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) # undef soc_is_omap443x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) # undef soc_is_omap446x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) # undef soc_is_omap447x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) # define soc_is_omap44xx() is_omap44xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) # define soc_is_omap443x() is_omap443x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) # define soc_is_omap446x() is_omap446x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) # define soc_is_omap447x() is_omap447x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) # endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) # if defined(CONFIG_SOC_OMAP5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) # undef soc_is_omap54xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) # undef soc_is_omap543x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) # define soc_is_omap54xx() is_omap54xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) # define soc_is_omap543x() is_omap543x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #if defined(CONFIG_SOC_DRA7XX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #undef soc_is_dra7xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #undef soc_is_dra76x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #undef soc_is_dra76x_abz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #undef soc_is_dra76x_acd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #undef soc_is_dra74x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #undef soc_is_dra72x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define soc_is_dra7xx() is_dra7xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define soc_is_dra76x() is_dra76x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define soc_is_dra76x_abz() is_dra76x_abz()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define soc_is_dra76x_acd() is_dra76x_acd()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define soc_is_dra74x() is_dra75x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define soc_is_dra72x() is_dra72x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /* Various silicon revisions for omap2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) #define OMAP242X_CLASS 0x24200024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define OMAP2420_REV_ES1_0 OMAP242X_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define OMAP243X_CLASS 0x24300024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define OMAP2430_REV_ES1_0 OMAP243X_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define OMAP343X_CLASS 0x34300034
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define OMAP3430_REV_ES1_0 OMAP343X_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define OMAP363X_CLASS 0x36300034
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define OMAP3630_REV_ES1_0 OMAP363X_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #define TI816X_CLASS 0x81600081
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #define TI8168_REV_ES1_0 TI816X_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #define TI8168_REV_ES2_0 (TI816X_CLASS | (0x2 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define TI8168_REV_ES2_1 (TI816X_CLASS | (0x3 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #define TI814X_CLASS 0x81400081
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) #define TI8148_REV_ES1_0 TI814X_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) #define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define AM35XX_CLASS 0x35170034
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define AM35XX_REV_ES1_0 AM35XX_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) #define AM335X_CLASS 0x33500033
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #define AM335X_REV_ES1_0 AM335X_CLASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #define AM335X_REV_ES2_0 (AM335X_CLASS | (0x1 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #define AM335X_REV_ES2_1 (AM335X_CLASS | (0x2 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define AM437X_CLASS 0x43700000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #define AM437X_REV_ES1_0 (AM437X_CLASS | (0x10 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) #define AM437X_REV_ES1_1 (AM437X_CLASS | (0x11 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #define AM437X_REV_ES1_2 (AM437X_CLASS | (0x12 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define OMAP443X_CLASS 0x44300044
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) #define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define OMAP446X_CLASS 0x44600044
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #define OMAP447X_CLASS 0x44700044
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) #define OMAP54XX_CLASS 0x54000054
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #define OMAP5430_REV_ES2_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #define DRA7XX_CLASS 0x07000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) #define DRA762_REV_ES1_0 (DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #define DRA762_ABZ_REV_ES1_0 (DRA762_REV_ES1_0 | (2 << 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define DRA762_ACD_REV_ES1_0 (DRA762_REV_ES1_0 | (3 << 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) #define DRA722_REV_ES2_0 (DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #define DRA722_REV_ES2_1 (DRA7XX_CLASS | (0x22 << 16) | (0x21 << 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) void omap2xxx_check_revision(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) void omap3xxx_check_revision(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) void omap4xxx_check_revision(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) void omap5xxx_check_revision(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) void dra7xxx_check_revision(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) void omap3xxx_check_features(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) void ti81xx_check_features(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) void am33xx_check_features(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) void omap4xxx_check_features(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * Runtime detection of OMAP3 features
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * family have OS-level control over the I/O chain clock. This is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * to avoid a window during which wakeups could potentially be lost
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) * during powerdomain transitions. If this bit is set, it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) * indicates that the chip does support OS-level control of this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) * feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) extern u32 omap_features;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #define OMAP3_HAS_L2CACHE BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #define OMAP3_HAS_IVA BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #define OMAP3_HAS_SGX BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) #define OMAP3_HAS_NEON BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) #define OMAP3_HAS_ISP BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #define OMAP3_HAS_192MHZ_CLK BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #define OMAP3_HAS_IO_WAKEUP BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) #define OMAP3_HAS_SDRC BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #define OMAP4_HAS_PERF_SILICON BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #define OMAP3_HAS_FEATURE(feat,flag) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static inline unsigned int omap3_has_ ##feat(void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) return omap_features & OMAP3_HAS_ ##flag; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) OMAP3_HAS_FEATURE(l2cache, L2CACHE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) OMAP3_HAS_FEATURE(sgx, SGX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) OMAP3_HAS_FEATURE(iva, IVA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) OMAP3_HAS_FEATURE(neon, NEON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) OMAP3_HAS_FEATURE(isp, ISP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) OMAP3_HAS_FEATURE(sdrc, SDRC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * Runtime detection of OMAP4 features
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) #define OMAP4_HAS_FEATURE(feat, flag) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) static inline unsigned int omap4_has_ ##feat(void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return omap_features & OMAP4_HAS_ ##flag; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * We need to make sure omap initcalls don't run when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * multiplatform kernels are booted on other SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #define omap_initcall(level, fn) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) static int __init __used __##fn(void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (!soc_is_omap()) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return fn(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) level(__##fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) #define omap_early_initcall(fn) omap_initcall(early_initcall, fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #define omap_core_initcall(fn) omap_initcall(core_initcall, fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #define omap_postcore_initcall(fn) omap_initcall(postcore_initcall, fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #define omap_arch_initcall(fn) omap_initcall(arch_initcall, fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #define omap_subsys_initcall(fn) omap_initcall(subsys_initcall, fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #define omap_device_initcall(fn) omap_initcall(device_initcall, fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #define omap_late_initcall(fn) omap_initcall(late_initcall, fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) #define omap_late_initcall_sync(fn) omap_initcall(late_initcall_sync, fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) /* Legacy defines, these can be removed when users are removed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) #define cpu_is_omap2420() soc_is_omap2420()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) #define cpu_is_omap2422() soc_is_omap2422()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #define cpu_is_omap242x() soc_is_omap242x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) #define cpu_is_omap2430() soc_is_omap2430()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #define cpu_is_omap243x() soc_is_omap243x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) #define cpu_is_omap24xx() soc_is_omap24xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #define cpu_is_omap3430() soc_is_omap3430()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) #define cpu_is_omap343x() soc_is_omap343x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #define cpu_is_omap34xx() soc_is_omap34xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #define cpu_is_omap3630() soc_is_omap3630()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) #define cpu_is_omap443x() soc_is_omap443x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) #define cpu_is_omap446x() soc_is_omap446x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #define cpu_is_omap44xx() soc_is_omap44xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) #define cpu_is_ti814x() soc_is_ti814x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #define cpu_is_ti816x() soc_is_ti816x()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) #define cpu_is_ti81xx() soc_is_ti81xx()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) #endif /* __ASSEMBLY__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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