Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_24XX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_24XX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * OMAP24XX Power/Reset Management register bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (C) 2007 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Copyright (C) 2007 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Written by Paul Walmsley
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "prm2xxx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define OMAP24XX_EN_CORE_SHIFT 				0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define OMAP24XX_FORCESTATE_MASK			(1 << 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define OMAP24XX_AUTOIDLE_MASK				(1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define OMAP24XX_AUTO_EXTVOLT_MASK			(1 << 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define OMAP24XX_SETOFF_LEVEL_SHIFT			12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define OMAP24XX_MEMRETCTRL_MASK			(1 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define OMAP24XX_SETRET_LEVEL_SHIFT			6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define OMAP24XX_VOLT_LEVEL_SHIFT			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define OMAP2420_CLKOUT2_EN_SHIFT			15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define OMAP2420_CLKOUT2_DIV_SHIFT			11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define OMAP2420_CLKOUT2_DIV_WIDTH			3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define OMAP2420_CLKOUT2_SOURCE_MASK			(0x3 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define OMAP24XX_CLKOUT_EN_SHIFT			7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define OMAP24XX_CLKOUT_DIV_SHIFT			3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define OMAP24XX_CLKOUT_DIV_WIDTH			3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define OMAP24XX_CLKOUT_SOURCE_MASK			(0x3 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define OMAP24XX_EMULATION_EN_SHIFT			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define OMAP24XX_EXTWMPU_RST_SHIFT			6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define OMAP24XX_SECU_WD_RST_SHIFT			5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OMAP24XX_MPU_WD_RST_SHIFT			4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define OMAP24XX_SECU_VIOL_RST_SHIFT			3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #endif