^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * AM43xx Power domains framework
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 Texas Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "powerdomain.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "prcm-common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "prcm44xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "prcm43xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static struct powerdomain gfx_43xx_pwrdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .name = "gfx_pwrdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .voltdm = { .name = "core" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .prcm_offs = AM43XX_PRM_GFX_INST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .prcm_partition = AM43XX_PRM_PARTITION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .pwrsts = PWRSTS_OFF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .banks = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .pwrsts_mem_on = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) [0] = PWRSTS_ON, /* gfx_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static struct powerdomain mpu_43xx_pwrdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .name = "mpu_pwrdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .voltdm = { .name = "mpu" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .prcm_offs = AM43XX_PRM_MPU_INST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .prcm_partition = AM43XX_PRM_PARTITION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .pwrsts = PWRSTS_OFF_RET_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .pwrsts_logic_ret = PWRSTS_OFF_RET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .banks = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .pwrsts_mem_ret = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) [0] = PWRSTS_OFF_RET, /* mpu_l1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) [1] = PWRSTS_OFF_RET, /* mpu_l2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) [2] = PWRSTS_OFF_RET, /* mpu_ram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .pwrsts_mem_on = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) [0] = PWRSTS_ON, /* mpu_l1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) [1] = PWRSTS_ON, /* mpu_l2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) [2] = PWRSTS_ON, /* mpu_ram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static struct powerdomain rtc_43xx_pwrdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .name = "rtc_pwrdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .voltdm = { .name = "rtc" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .prcm_offs = AM43XX_PRM_RTC_INST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .prcm_partition = AM43XX_PRM_PARTITION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .pwrsts = PWRSTS_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static struct powerdomain wkup_43xx_pwrdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .name = "wkup_pwrdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .voltdm = { .name = "core" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .prcm_offs = AM43XX_PRM_WKUP_INST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .prcm_partition = AM43XX_PRM_PARTITION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .pwrsts = PWRSTS_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .banks = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .pwrsts_mem_on = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) [0] = PWRSTS_ON, /* debugss_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static struct powerdomain tamper_43xx_pwrdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .name = "tamper_pwrdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .voltdm = { .name = "tamper" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .prcm_offs = AM43XX_PRM_TAMPER_INST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .prcm_partition = AM43XX_PRM_PARTITION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .pwrsts = PWRSTS_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static struct powerdomain cefuse_43xx_pwrdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .name = "cefuse_pwrdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .voltdm = { .name = "core" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .prcm_offs = AM43XX_PRM_CEFUSE_INST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .prcm_partition = AM43XX_PRM_PARTITION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .pwrsts = PWRSTS_OFF_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static struct powerdomain per_43xx_pwrdm = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .name = "per_pwrdm",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .voltdm = { .name = "core" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .prcm_offs = AM43XX_PRM_PER_INST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .prcm_partition = AM43XX_PRM_PARTITION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .pwrsts = PWRSTS_OFF_RET_ON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .pwrsts_logic_ret = PWRSTS_OFF_RET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .banks = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .pwrsts_mem_ret = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) [0] = PWRSTS_OFF_RET, /* icss_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) [1] = PWRSTS_OFF_RET, /* per_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) [2] = PWRSTS_OFF_RET, /* ram1_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) [3] = PWRSTS_OFF_RET, /* ram2_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .pwrsts_mem_on = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) [0] = PWRSTS_ON, /* icss_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) [1] = PWRSTS_ON, /* per_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) [2] = PWRSTS_ON, /* ram1_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) [3] = PWRSTS_ON, /* ram2_mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static struct powerdomain *powerdomains_am43xx[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) &gfx_43xx_pwrdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) &mpu_43xx_pwrdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) &rtc_43xx_pwrdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) &wkup_43xx_pwrdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) &tamper_43xx_pwrdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) &cefuse_43xx_pwrdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) &per_43xx_pwrdm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int am43xx_check_vcvp(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) void __init am43xx_powerdomains_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) omap4_pwrdm_operations.pwrdm_has_voltdm = am43xx_check_vcvp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) pwrdm_register_pwrdms(powerdomains_am43xx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) pwrdm_complete_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }