^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Legacy platform_data quirks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/davinci_emac.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/wl12xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mmc/card.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mmc/host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/power/smartreflex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/platform_data/pinctrl-single.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/platform_data/hsmmc-omap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/platform_data/iommu-omap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_data/ti-sysc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/platform_data/wkup_m3.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/platform_data/asoc-ti-mcbsp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/platform_data/ti-prm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "clockdomain.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include "common-board-devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "control.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "omap_device.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "omap-secure.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include "soc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static struct omap_hsmmc_platform_data __maybe_unused mmc_pdata[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct pdata_init {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) const char *compatible;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) void (*fn)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct of_dev_auxdata omap_auxdata_lookup[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static struct twl4030_gpio_platform_data twl_gpio_auxdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #if IS_ENABLED(CONFIG_OMAP_IOMMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u8 *pwrst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) bool request, u8 *pwrst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #ifdef CONFIG_MACH_NOKIA_N8X0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static void __init omap2420_n8x0_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) omap_auxdata_lookup[0].platform_data = n8x0_legacy_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define omap2420_n8x0_legacy_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #ifdef CONFIG_ARCH_OMAP3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * Configures GPIOs 126, 127 and 129 to 1.8V mode instead of 3.0V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * mode for MMC1 in case bootloader did not configure things.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Note that if the pins are used for MMC1, pbias-regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * manages the IO voltage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void __init omap3_gpio126_127_129(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) reg = omap_ctrl_readl(OMAP343X_CONTROL_PBIAS_LITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) reg &= ~OMAP343X_PBIASLITEVMODE1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) reg |= OMAP343X_PBIASLITEPWRDNZ1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) omap_ctrl_writel(reg, OMAP343X_CONTROL_PBIAS_LITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (cpu_is_omap3630()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) reg = omap_ctrl_readl(OMAP34XX_CONTROL_WKUP_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) reg |= OMAP36XX_GPIO_IO_PWRDNZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) omap_ctrl_writel(reg, OMAP34XX_CONTROL_WKUP_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static void __init hsmmc2_internal_input_clk(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) u32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) reg = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) reg |= OMAP2_MMCSDIO2ADPCLKISEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static struct iommu_platform_data omap3_iommu_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .reset_name = "mmu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .assert_reset = omap_device_assert_hardreset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .deassert_reset = omap_device_deassert_hardreset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .device_enable = omap_device_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .device_idle = omap_device_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct iommu_platform_data omap3_iommu_isp_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .device_enable = omap_device_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .device_idle = omap_device_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int omap3_sbc_t3730_twl_callback(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) unsigned gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) unsigned ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) "wlan pwr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) gpio_export(gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) pr_err("SBC-T3x: %s reset gpio request failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) hub_name, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) gpio_export(gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) gpio_set_value(gpio, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static void __init omap3_sbc_t3730_twl_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static void __init omap3_sbc_t3730_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static void __init omap3_sbc_t3530_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static void __init omap3_evm_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) hsmmc2_internal_input_clk();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static void am35xx_enable_emac_int(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) u32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static void am35xx_disable_emac_int(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) u32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static struct emac_platform_data am35xx_emac_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .interrupt_enable = am35xx_enable_emac_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .interrupt_disable = am35xx_disable_emac_int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static void __init am35xx_emac_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) u32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) v &= ~AM35XX_CPGMACSS_SW_RST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static struct gpio cm_t3517_wlan_gpios[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) { 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) { 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static void __init omap3_sbc_t3517_wifi_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) int err = gpio_request_array(cm_t3517_wlan_gpios,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) ARRAY_SIZE(cm_t3517_wlan_gpios));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) gpio_export(cm_t3517_wlan_gpios[0].gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) gpio_export(cm_t3517_wlan_gpios[1].gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static void __init omap3_sbc_t3517_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) am35xx_emac_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) hsmmc2_internal_input_clk();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) omap3_sbc_t3517_wifi_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static void __init am3517_evm_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) am35xx_emac_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static void __init nokia_n900_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) hsmmc2_internal_input_clk();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) mmc_pdata[0].name = "external";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) mmc_pdata[1].name = "internal";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) pr_info("RX-51: Enabling ARM errata 430973 workaround\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* set IBE to 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) rx51_secure_update_aux_cr(BIT(6), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) pr_warn("RX-51: Not enabling ARM errata 430973 workaround\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) pr_warn("Thumb binaries may crash randomly without this workaround\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static void __init omap3_tao3530_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) hsmmc2_internal_input_clk();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static void __init omap3_logicpd_torpedo_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) omap3_gpio126_127_129();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* omap3pandora legacy devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static struct platform_device pandora_backlight = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .name = "pandora-backlight",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static void __init omap3_pandora_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) platform_device_register(&pandora_backlight);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #endif /* CONFIG_ARCH_OMAP3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static struct wkup_m3_platform_data wkup_m3_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .reset_name = "wkup_m3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .assert_reset = omap_device_assert_hardreset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .deassert_reset = omap_device_deassert_hardreset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #ifdef CONFIG_SOC_OMAP5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static void __init omap5_uevm_legacy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #ifdef CONFIG_SOC_DRA7XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static struct iommu_platform_data dra7_ipu1_dsp_iommu_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) .set_pwrdm_constraint = omap_iommu_set_pwrdm_constraint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static void __init dra7x_evm_mmc_quirk(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) dra7_hsmmc_data_mmc1.version = "rev11";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) dra7_hsmmc_data_mmc1.max_freq = 96000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) dra7_hsmmc_data_mmc2.version = "rev11";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dra7_hsmmc_data_mmc2.max_freq = 48000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) dra7_hsmmc_data_mmc3.version = "rev11";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dra7_hsmmc_data_mmc3.max_freq = 48000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static struct clockdomain *ti_sysc_find_one_clockdomain(struct clk *clk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) struct clk_hw *hw = __clk_get_hw(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct clockdomain *clkdm = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) struct clk_hw_omap *hwclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) hwclk = to_clk_hw_omap(hw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (!omap2_clk_is_hw_omap(hw))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (hwclk && hwclk->clkdm_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) clkdm = clkdm_lookup(hwclk->clkdm_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return clkdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * ti_sysc_clkdm_init - find clockdomain based on clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * @fck: device functional clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * @ick: device interface clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * @dev: struct device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * Populate clockdomain based on clock. It is needed for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * clkdm_deny_idle() and clkdm_allow_idle() for blocking clockdomain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * clockdomain idle during reset, enable and idle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * Note that we assume interconnect driver manages the clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * and do not need to populate oh->_clk for dynamically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * allocated modules.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static int ti_sysc_clkdm_init(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct clk *fck, struct clk *ick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) struct ti_sysc_cookie *cookie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (!IS_ERR(fck))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) cookie->clkdm = ti_sysc_find_one_clockdomain(fck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (cookie->clkdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (!IS_ERR(ick))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) cookie->clkdm = ti_sysc_find_one_clockdomain(ick);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (cookie->clkdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static void ti_sysc_clkdm_deny_idle(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) const struct ti_sysc_cookie *cookie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (cookie->clkdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) clkdm_deny_idle(cookie->clkdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static void ti_sysc_clkdm_allow_idle(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) const struct ti_sysc_cookie *cookie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (cookie->clkdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) clkdm_allow_idle(cookie->clkdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static int ti_sysc_enable_module(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) const struct ti_sysc_cookie *cookie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (!cookie->data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return omap_hwmod_enable(cookie->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static int ti_sysc_idle_module(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) const struct ti_sysc_cookie *cookie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (!cookie->data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) return omap_hwmod_idle(cookie->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static int ti_sysc_shutdown_module(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) const struct ti_sysc_cookie *cookie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (!cookie->data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return omap_hwmod_shutdown(cookie->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) static bool ti_sysc_soc_type_gp(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return omap_type() == OMAP2_DEVICE_TYPE_GP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static struct of_dev_auxdata omap_auxdata_lookup[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static struct ti_sysc_platform_data ti_sysc_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .auxdata = omap_auxdata_lookup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .soc_type_gp = ti_sysc_soc_type_gp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .init_clockdomain = ti_sysc_clkdm_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .clkdm_deny_idle = ti_sysc_clkdm_deny_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .clkdm_allow_idle = ti_sysc_clkdm_allow_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .init_module = omap_hwmod_init_module,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .enable_module = ti_sysc_enable_module,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .idle_module = ti_sysc_idle_module,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .shutdown_module = ti_sysc_shutdown_module,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static struct pcs_pdata pcs_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) void omap_pcs_legacy_init(int irq, void (*rearm)(void))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) pcs_pdata.irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) pcs_pdata.rearm = rearm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static struct ti_prm_platform_data ti_prm_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .clkdm_deny_idle = clkdm_deny_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .clkdm_allow_idle = clkdm_allow_idle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .clkdm_lookup = clkdm_lookup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * GPIOs for TWL are initialized by the I2C bus and need custom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * handing until DSS has device tree bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) void omap_auxdata_legacy_init(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (dev->platform_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (strcmp("twl4030-gpio", dev_name(dev)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) dev->platform_data = &twl_gpio_auxdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #if IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static struct omap_mcbsp_platform_data mcbsp_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static void __init omap3_mcbsp_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) omap3_mcbsp_init_pdata_callback(&mcbsp_pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static void __init omap3_mcbsp_init(void) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * Few boards still need auxdata populated before we populate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * the dev entries in of_platform_populate().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static struct pdata_init auxdata_quirks[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) #ifdef CONFIG_SOC_OMAP2420
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) { "nokia,n800", omap2420_n8x0_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) { "nokia,n810", omap2420_n8x0_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) { "nokia,n810-wimax", omap2420_n8x0_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #ifdef CONFIG_ARCH_OMAP3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_twl_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct omap_sr_data __maybe_unused omap_sr_pdata[OMAP_SR_NR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) static struct of_dev_auxdata omap_auxdata_lookup[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) #ifdef CONFIG_MACH_NOKIA_N8X0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) OF_DEV_AUXDATA("tlv320aic3x", 0x18, "2-0018", &n810_aic33_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #ifdef CONFIG_ARCH_OMAP3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) &omap3_iommu_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) OF_DEV_AUXDATA("ti,omap2-iommu", 0x480bd400, "480bd400.mmu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) &omap3_iommu_isp_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) "480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) "480c9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /* Only on am3517 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) &am35xx_emac_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) OF_DEV_AUXDATA("nokia,n900-rom-rng", 0, NULL, rx51_secure_rng_call),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /* McBSP modules with sidetone core */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #if IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49022000, "49022000.mcbsp", &mcbsp_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49024000, "49024000.mcbsp", &mcbsp_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) #ifdef CONFIG_SOC_AM33XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) OF_DEV_AUXDATA("ti,am3352-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) &wkup_m3_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) #ifdef CONFIG_SOC_AM43XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) &wkup_m3_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) OF_DEV_AUXDATA("ti,omap4-smartreflex-iva", 0x4a0db000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) "4a0db000.smartreflex", &omap_sr_pdata[OMAP_SR_IVA]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) OF_DEV_AUXDATA("ti,omap4-smartreflex-core", 0x4a0dd000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) "4a0dd000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) OF_DEV_AUXDATA("ti,omap4-smartreflex-mpu", 0x4a0d9000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) "4a0d9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) #ifdef CONFIG_SOC_DRA7XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) &dra7_hsmmc_data_mmc1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) &dra7_hsmmc_data_mmc2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) &dra7_hsmmc_data_mmc3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x40d01000, "40d01000.mmu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) &dra7_ipu1_dsp_iommu_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41501000, "41501000.mmu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) &dra7_ipu1_dsp_iommu_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) OF_DEV_AUXDATA("ti,dra7-iommu", 0x58882000, "58882000.mmu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) &dra7_ipu1_dsp_iommu_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) /* Common auxdata */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) OF_DEV_AUXDATA("ti,omap-prm-inst", 0, NULL, &ti_prm_pdata),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) OF_DEV_AUXDATA("ti,omap-sdma", 0, NULL, &dma_plat_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * Few boards still need to initialize some legacy devices with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * platform data until the drivers support device tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static struct pdata_init pdata_quirks[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) #ifdef CONFIG_ARCH_OMAP3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) { "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) { "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) { "nokia,omap3-n900", nokia_n900_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) { "nokia,omap3-n950", hsmmc2_internal_input_clk, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) { "logicpd,dm3730-torpedo-devkit", omap3_logicpd_torpedo_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) { "ti,omap3-evm-37xx", omap3_evm_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) { "ti,am3517-evm", am3517_evm_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) { "technexion,omap3-tao3530", omap3_tao3530_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) { "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) { "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) #ifdef CONFIG_SOC_OMAP5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) { "ti,omap5-uevm", omap5_uevm_legacy_init, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) #ifdef CONFIG_SOC_DRA7XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) { "ti,dra7-evm", dra7x_evm_mmc_quirk, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) { /* sentinel */ },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) static void pdata_quirks_check(struct pdata_init *quirks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) while (quirks->compatible) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (of_machine_is_compatible(quirks->compatible)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (quirks->fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) quirks->fn();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) quirks++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * We still need this for omap2420 and omap3 PM to work, others are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * using drivers/misc/sram.c already.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (of_machine_is_compatible("ti,omap2420") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) of_machine_is_compatible("ti,omap3"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) omap_sdrc_init(NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (of_machine_is_compatible("ti,omap3"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) omap3_mcbsp_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) pdata_quirks_check(auxdata_quirks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) of_platform_populate(NULL, omap_dt_match_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) omap_auxdata_lookup, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) pdata_quirks_check(pdata_quirks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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