^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * OMAP4 OPP table definitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2010-2012 Texas Instruments Incorporated - https://www.ti.com/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Nishanth Menon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Kevin Hilman
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Thara Gopinath
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2010-2011 Nokia Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Eduardo Valentin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Paul Walmsley
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * This program is distributed "as is" WITHOUT ANY WARRANTY of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * kind, whether express or implied; without even the implied warranty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "soc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "control.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "omap_opp_data.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "pm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * Structures containing OMAP4430 voltage supported and various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * voltage dependent data for each VDD.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define OMAP4430_VDD_MPU_OPP50_UV 1025000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define OMAP4430_VDD_MPU_OPP100_UV 1200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define OMAP4430_VDD_MPU_OPPTURBO_UV 1325000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define OMAP4430_VDD_MPU_OPPNITRO_UV 1388000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OMAP4430_VDD_MPU_OPPNITROSB_UV 1398000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct omap_volt_data omap443x_vdd_mpu_volt_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITROSB_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITROSB, 0xfa, 0x27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) VOLT_DATA_DEFINE(0, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define OMAP4430_VDD_IVA_OPP50_UV 950000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define OMAP4430_VDD_IVA_OPP100_UV 1114000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define OMAP4430_VDD_IVA_OPPTURBO_UV 1291000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct omap_volt_data omap443x_vdd_iva_volt_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) VOLT_DATA_DEFINE(0, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define OMAP4430_VDD_CORE_OPP50_UV 962000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define OMAP4430_VDD_CORE_OPP100_UV 1127000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct omap_volt_data omap443x_vdd_core_volt_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) VOLT_DATA_DEFINE(0, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define OMAP4460_VDD_MPU_OPP50_UV 1025000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define OMAP4460_VDD_MPU_OPP100_UV 1200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define OMAP4460_VDD_MPU_OPPNITRO_UV 1375000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct omap_volt_data omap446x_vdd_mpu_volt_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) VOLT_DATA_DEFINE(0, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define OMAP4460_VDD_IVA_OPP50_UV 1025000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define OMAP4460_VDD_IVA_OPP100_UV 1200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define OMAP4460_VDD_IVA_OPPTURBO_UV 1313000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define OMAP4460_VDD_IVA_OPPNITRO_UV 1375000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct omap_volt_data omap446x_vdd_iva_volt_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPNITRO, 0xfa, 0x23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) VOLT_DATA_DEFINE(0, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define OMAP4460_VDD_CORE_OPP50_UV 1025000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define OMAP4460_VDD_CORE_OPP100_UV 1200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define OMAP4460_VDD_CORE_OPP100_OV_UV 1250000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct omap_volt_data omap446x_vdd_core_volt_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) VOLT_DATA_DEFINE(0, 0, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };