Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * This file contains the processor specific definitions of the TI OMAP34XX.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2007 Texas Instruments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2007 Nokia Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #ifndef __ASM_ARCH_OMAP3_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __ASM_ARCH_OMAP3_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * Please place only base defines here and put the rest in device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * specific headers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define L4_34XX_BASE		0x48000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define L4_WK_34XX_BASE		0x48300000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define L4_PER_34XX_BASE	0x49000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define L4_EMU_34XX_BASE	0x54000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define L3_34XX_BASE		0x68000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define L4_WK_AM33XX_BASE	0x44C00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define OMAP3430_32KSYNCT_BASE	0x48320000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define OMAP3430_CM_BASE	0x48004800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define OMAP3430_PRM_BASE	0x48306800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define OMAP343X_SMS_BASE	0x6C000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define OMAP343X_SDRC_BASE	0x6D000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define OMAP34XX_GPMC_BASE	0x6E000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define OMAP343X_SCM_BASE	0x48002000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define OMAP343X_CTRL_BASE	OMAP343X_SCM_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define OMAP34XX_IC_BASE	0x48200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define OMAP3430_ISP_BASE	(L4_34XX_BASE + 0xBC000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OMAP3430_ISP_MMU_BASE	(OMAP3430_ISP_BASE + 0x1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define OMAP3430_ISP_BASE2	(OMAP3430_ISP_BASE + 0x1800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define OMAP34XX_HSUSB_OTG_BASE	(L4_34XX_BASE + 0xAB000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define OMAP34XX_USBTLL_BASE	(L4_34XX_BASE + 0x62000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define OMAP34XX_UHH_CONFIG_BASE	(L4_34XX_BASE + 0x64000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define OMAP34XX_OHCI_BASE	(L4_34XX_BASE + 0x64400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define OMAP34XX_EHCI_BASE	(L4_34XX_BASE + 0x64800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define OMAP34XX_SR1_BASE	0x480C9000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define OMAP34XX_SR2_BASE	0x480CB000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define OMAP34XX_MAILBOX_BASE		(L4_34XX_BASE + 0x94000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Security */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define OMAP34XX_SEC_BASE	(L4_34XX_BASE + 0xA0000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define OMAP34XX_SEC_SHA1MD5_BASE	(OMAP34XX_SEC_BASE + 0x23000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define OMAP34XX_SEC_AES_BASE	(OMAP34XX_SEC_BASE + 0x25000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif /* __ASM_ARCH_OMAP3_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)