^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * omap2-restart.c - code common to all OMAP2xxx machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2012 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Paul Walmsley
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "soc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "prm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * clock and the sys_ck. Used during the reset process
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static struct clk *reset_virt_prcm_set_ck, *reset_sys_ck;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Reboot handling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * omap2xxx_restart - Set DPLL to bypass mode for reboot to work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * Set the DPLL to bypass so that reboot completes successfully. No
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * return value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) rate = clk_get_rate(reset_sys_ck);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) clk_set_rate(reset_virt_prcm_set_ck, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* XXX Should save the cmd argument for use after the reboot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) omap_prm_reset_system();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * omap2xxx_common_look_up_clks_for_reset - look up clocks needed for restart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * Some clocks need to be looked up in advance for the SoC restart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * operation to work - see omap2xxx_restart(). Returns -EINVAL upon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * error or 0 upon success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static int __init omap2xxx_common_look_up_clks_for_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) reset_virt_prcm_set_ck = clk_get(NULL, "virt_prcm_set");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (IS_ERR(reset_virt_prcm_set_ck))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) reset_sys_ck = clk_get(NULL, "sys_ck");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (IS_ERR(reset_sys_ck))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) omap_postcore_initcall(omap2xxx_common_look_up_clks_for_reset);